POWER ISA Contributed To Open-Source, OpenPOWER Joining The Linux Foundation

[tuxd3v]

This press release from 3 weeks ago says it does 4 TFLOPS in 20 Watts.

My bad, the article I read stated 6 TFLOPS for 5 Watts,
That is what it takes reading outside the source..

For what it seems, 4 TFLOPS and 25TOPS for less than 20 Watts in 16nm node size..
Probably power consumption will vary depending on what workloads you are running,
Less than 20 watts should be the worst case.. At least I interpret it like that..

If you take a big Nvidia GPU and constrain it to a 20 W power envelope, you probably get at least that. And they would utterly spank it, in TOPS.

don't know, it could be,
Nvidia is also VLIW( I think.. ), but his it 16 nm?

Could you achieve that with NVidia in less than 20 watts?

[curaga]

@eltomito: It's quite a bit easier to write vector code for Power compared to x86. Whether it runs faster (vs C on the same cpu) depends on many things, I've seen both cases.

[ldesnogu]

Fujitsu has not dropped SPARC in favor of ARM except in the HPC product line (SPARC64FX.) For general-purpose Unix servers, Fujitsu SPARC64 continues, and another generation is on the roadmap.

Thanks for correcting me, that's good news!

I couldn't find any recent roadmap. Their last announcement was in 2017 for a CPU to be released in 2020. These Japanese companies don't talk a lot

[L_A_G]

Except that POWER is generating revenue into the $Billions for IBM, and RHEL on POWER is a significant part of that. The top500 supercomputer list shows POWER running 3 of the top 10 supercomputers, including the #1 and #2 largest.

You'd have a point about supercomputing if all of those machines weren't both U.S DoE (the Department of Energy, or as I call them; "Thermonuclear Bombs 'R Us") pork barrel projects. There's 6 IBM Power machines/clusters in the June top 100 and all but one of them is a U.S DoE machine/cluster.

Now that the long slow sinking of intel's Itanic is done, there is an opening for a high end chip to replace it. HP-UX and OpenVMS still run on Itanium exclusively. And don't forget SPARC, which is in active development, and has 3rd party (Fujitsu) implementations as well.

Sure, there's third party implementations of SPARC, but those are all tied to Japan's long running, and taxpayer funded, supercomputing project which is right now working on the "Post K"-machines which drop SPARC64 in favor or ARMv8!

Too many people wrongly assume AMD64 processors (including the intel clones) are the only relevant thing out there, but the market says otherwise.

Sure, they're not all that's out there, but outside of government funded projects where cost efficiency isn't that big of a concern they sure do tend to dominate things. Maybe with RIKEN switching to ARM it could mean that we get a duopoly instead of a monopoly.

Not that supercomputer top 500 listings are all that great at predicting where the market is actually going. Before the latest couple of DoE machines went up the machine that held the #1 spot was the Chinese Sunway TaihuLight that uses locally developed CPUs based on MIPS of all things.

[ldesnogu]

Before the latest couple of DoE machines went up the machine that held the #1 spot was the Chinese Sunway TaihuLight that uses locally developed CPUs based on MIPS of all things.

As far as I know the CPU used in that system were designed from the ground up including the ISA, and don't rely on MIPS.

[L_A_G]

As far as I know the CPU used in that system were designed from the ground up including the ISA, and don't rely on MIPS.

From what I read it was a highly customized and non-compatible extension of MIPS with small CPU cores tied to huge vector instruction units. So I guess you could say that those things were actually about as much MIPS-based as the Cell architecture was Power-based with the way those things were essentially PPC cores tied to fancy vector instruction units with their own ISA.

[ldesnogu]

From what I read it was a highly customized and non-compatible extension of MIPS with small CPU cores tied to huge vector instruction units. So I guess you could say that those things were actually about as much MIPS-based as the Cell architecture was Power-based with the way those things were essentially PPC cores tied to fancy vector instruction units with their own ISA.

Do you have a reference? I failed to find one

[Dawn]

Rumors have been floating around for ages that SW26010 is MIPS or Alpha, but it's actually a domestic ISA (SW64.) Dongarra's overview of the system mentions this in passing, as does the PRC-origin literature on the subject.

[L_A_G]

Do you have a reference? I failed to find one

EDIT: Looks like I misread a whole bunch there. The wikipedia article had a reference to the Loongson architecture, which is a Chinese MIPS64 series of processors so I may have remembered incorrectly or then they've scrubbed mention of the main control CPU being MIPS based as it right now states that it's based on some unspecified RISC ISA.

[coder]

don't know, it could be,
Nvidia is also VLIW( I think.. ), but his it 16 nm?

I think, in their distant past. These days, it's SIMD + SMT. The difference is that memory stalls are very efficiently dealt with, by SMT. On VLIW, they're crippling.