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[ldesnogu]

I definitely would like to see that comparison too. I'd also like to see the impact of microcode changes, but I guess that's much more complex as you'd...

[ldesnogu]

Hmm, I'm not sure this has happened: Adreno 640 is in Snapdragon 855 which has already been released.


Ditto. The closest thing is...

[ldesnogu]

Send it to the qemu-dev mailing list. Better than nothing :-)...

[ldesnogu]

A uop cache can reduce the number of pipe stages compared to the fetch - decode pipe. And it's close to CPU.


And detecting the pairs...

[ldesnogu]

To complement what blargh4 wrote, we were discussing higher-end chips, not the low-end.

At the higher-end of the performance spectrum the...

[ldesnogu]

I'm surprised to see some of the top frequencies to exceed the official 3.9 GHz max turbo. Any explanation?

I'm glad to see Intel marketing...

[ldesnogu]

ARM 64-bit ISA was designed in the 2010s. It's not the old ARM 32-bit anymore.


RISC-V ISA shortcomings will require some work at...

[ldesnogu]

You're mixing things that are unrelated. The OS does things to save power. The CPU too but one doesn't imply the other.

Also FYI Apple...