Intel Arc Graphics A750 + A770 Linux Gaming Performance

[Anux]

So, it's only a (tiny) cost savings at the silicon level, and shaving off a couple $0.01 from the graphics card board cost.

If you only knew how greedy they are when it comes to those little penny's.

PCIe 5.0 has none of that. It's just a straight clock-doubling exercise, from 3.0 to 5.0.

Argh, right, I mixed that up.

The only reason even to do it is to surpass the limits of what a single controller can handle. By definition, you need multiple controllers. Otherwise, it's pointless. And if you want to make it transparent to the host, then you need a 3rd chip. I actually have a Western Digital card which works like that, but it's an x8 PCIe add-in card.

No, not a classical Raid controller, just a "simple" SSD controller. It's already the norm with channels, banks and multiple planes.

[coder]

No, not a classical Raid controller, just a "simple" SSD controller. It's already the norm with channels, banks and multiple planes.

If your SSD controller can hit the desired performance target, then there's no need for a RAID. You only use RAID-0 to surpass those limits.

[Anux]

If your SSD controller can hit the desired performance target, then there's no need for a RAID. You only use RAID-0 to surpass those limits.

I shouldn't have used the term Raid, I meant just using multiple memory chips and layers in parallel. Which of course is used to surpass the limits of a single memory chip.

[WannaBeOCer]

Some exciting news about Intel Arc support in Pytorch/Tensorflow: https://github.com/oneapi-src/oneDNN/issues/1465

I appreciate your interest in Intel Arc GPUs! Recently released oneDNN v2.7 includes optimizations for Intel Arc GPUs and utilizes XMX engines. At the moment you can run inference workloads imported from Tensorflow and Pytorch with Intel Distribution of OpenVINO Toolkit.

Keep an eye on future announcements around Pytorch and Tensorflow support.

[coder]

I shouldn't have used the term Raid, I meant just using multiple memory chips and layers in parallel. Which of course is used to surpass the limits of a single memory chip.

That's what SSD controllers already do, and the high-end drives routinely max out the number of channels.

[coder]

Some exciting news about Intel Arc support in Pytorch/Tensorflow: https://github.com/oneapi-src/oneDNN/issues/1465

I've been impressed with OpenVINO, on their iGPUs and CPUs. You can use it in GStreamer pipelines, using the elements provided in their DLStreamer project.

They're somewhat analogous to Nvidia's TensorRT & DeepStream, respectively.

[Anux]

That's what SSD controllers already do, and the high-end drives routinely max out the number of channels.

Exactly and by just extending that one could easily saturate PCIe 5 bandwidth.

[coder]

Exactly and by just extending that one could easily saturate PCIe 5 bandwidth.

No, because they're already maxing the highest-end controllers. I don't know why you seem to think they just left obvious performance wins unexploited. Besides, you can only fit so many chips on a M.2 board.

[Anux]

Why are you aways so stubborn? They could just build a controller with more channels or what ever gives them more parallel access. They build new controllers anyway.

[coder]

Why are you aways so stubborn?

You're being too dismissive of the practical and economic challenges involved in making faster SSDs. Since this entire exchange started with PCIe 5.0 not making much practical or economic sense for consumer desktops, such concerns are very relevant.

They could just build a controller with more channels or what ever gives them more parallel access. They build new controllers anyway.

I don't believe it simply didn't occur to anyone to add more channels to their controllers. You can actually find news coverage of new SSD controllers being announced, and the better reviews of SSDs delve into such details as which controller model is being used and how it's configured.

Born out of the (IMO, somewhat artificial) demand from PCIe 5.0 desktop platforms, there are PCIe 5.0 controllers and SSDs containing them on their way to market. Bolstered by faster flash, we should see speeds starting to peak above PCIe 4.0 limits. But, like we've been seeing just about everywhere else, it will come at the expense of significantly higher power consumption & heat output, not to mention cost. So, I don't consider it much in the way of progress.