Originally posted by vladpetric
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In terms of area, AVX bloats the register file, but I wonder if that's even enough to bother about.
Anyway, let's not forget this is a 10-way core with 6-wide decode! So, we're not exactly talking about a microcontroller or IoT core. And its ancestors had SSE/SSE2 going at least as far back as the 22 nm days, so you'd expect at least basic AVX/AVX2-support wouldn't be completely off the table.
In case you missed it: https://en.wikichip.org/wiki/intel/m...t#Architecture
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