Alibaba Crafts A 16-Core RISC-V Chip @ 2.5GHz

[dungeon]

I just built and ran CoreMark on my Kaveri box with GPU active and the benchmark workload seemed to be single core only.

The score was 13218; assuming the CPU was running at max boost (3.4 GHz) that gives 3.89 CM/MHz.

Here doing the same on Kabini box... and score was 9018 . CPU is @ 2205Mhz so rating is 4.13 CM/MHz.

It does not matter at what speed CPU is running (i tried to downcloked it to 1500 MHz) and i again got quite the same CM/MHz rating

I knew that smaller Kabini have higher rating than bigger Kaveri even without checking, so to prove this... this benchmark is good

Now I am not at all sure if math is the same for this 16 core RISC-V As that 7.1 CM/MHz sound high for single and low for multi

If they are really improved it to be 40% better there than any else RISC-V as advertised... then that is great, still i am not sure in this score

[starshipeleven]

It's still possible. It's not really about how many people will need these chips, but that it's possible to do.

It's not going to happen, numbers are too damn high. This isn't a kickstarter about a consumer product, and even for those you rarely get more than a few tens of thousands of backers.

[starshipeleven]

I'm just trying to shit on every non-copyleft license on every occasion I get.

shitting on it in the wrong occasions (i.e. when it actually would not matter one bit about the license) is detrimental to the cause, and makes you look like a moron.

[starshipeleven]

In any case, I guess the only way we'll know is if an open source CPU design actually takes off. I could see that maybe for embedded use, but I still think it wouldn't be in Alibaba's interests to use a fully open source core, for their purposes. They're doing this not just to protect themselves from US IP, but also for competitive reasons.

hardware design is extremely expensive, and Alibaba isn't a hardware maufacturer, but a service-oriented company, similar to Google.

This is one of the few situations where going opensource can actually makes economic sense.

[bridgman]

edit: seem i am reading too fast, while posting too slow

That right there is what we old guys call a race condition...

[Wrightsl]

Not many comments on how a non-hardware Chinese company is leapfrogging the rest of the world in this area.

[profoundWHALE]

My i7-8650U gets 8 CoreMark / MHz.

CoreMark is a very poor benchmark: as previously wrote it doesn't stress anything but L1 cache; there's no branch mispredict; and it's very sensitive to peculiar optimizations (see this for instance).

It's only a bad benchmark if you believe it's benchmarking, or, testing, something that it isn't. You can't really fault someone who makes a benchmark on something such as an impact, rates the product, and the consumers think its invincible. I'm pretty sure readers of phoronix understand that the reason why there are multiple benchmarks is because they all test different things.

Wanna know a great reason why not stressing L1 cache might be good? Testing CPUs with different L1 caches. Or perhaps testing with this benchmark and then another similar benchmark that stresses the caches. Then you can find out what is causing the performance disparity.

[dungeon]

That right there is what we old guys call a race condition...

I was actually at the same time trying to figure out what is this Flute with NLite about

https://www.guru3d.com/news-story/zen2-8c16t-with-navi-gpu-spotted-amd-consolechip,2.html

[Zola]

The fact that this design is proprietary is a perfect example of why permissive licenses are bad. If RISC-V was copylefted, people would be going through the publicly available design right now, and could consider grouping together to order these chips from a fab.

Well I don't think they will keep base RISC V design proprietary, what they certainly will is SIMD vector extensions all around 56 instructions so far. Which is more than entire RISC V instruction set & totally OK regarding RISC V philosophy.

[ldesnogu]

It's only a bad benchmark if you believe it's benchmarking, or, testing, something that it isn't. You can't really fault someone who makes a benchmark on something such as an impact, rates the product, and the consumers think its invincible. I'm pretty sure readers of phoronix understand that the reason why there are multiple benchmarks is because they all test different things.

It's bad because people here are using it to compare against x86 chips. I just wanted to point out the weaknesses of that benchmark. Is that bad?

And you conveniently removed the end of my message where I wrote I was expecting for other benchmark results. Because obviously a single benchmark isn't enough.

Wanna know a great reason why not stressing L1 cache might be good? Testing CPUs with different L1 caches. Or perhaps testing with this benchmark and then another similar benchmark that stresses the caches. Then you can find out what is causing the performance disparity.

Everyone can make a great L1 cache system in isolation of the rest of the CPU/system. Intel and AMD have spent dozens of years tuning their memory system beyond L1 cache to get good performance on real workloads, because this is what matters to end users. This CoreMark figure doesn't show that. And it also doesn't show anything about the markets Alibaba seems to target: AI and 5G.

And I'll stick to my claim: CoreMark is a poor benchmark, in the same way that Dhrystone is poor. You wouldn't judge a CPU on Dhrystone alone right?