Originally posted by carewolf
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I think they blithely thought they could manage AVX-512 threads at the OS level, using SIGILL exceptions to fault AVX-512 threads over from little cores to big ones. Then, when this turned out to work poorly in practice, then they decided to disable it on the big cores. Time will tell, but I think when people get Alder Lake under a microscope, they'll see the AVX-512 logic in the big cores, sitting dark.
Intel can't walk away from AVX-512, in their mainstream products. I think we'll see it come back, once they add it into their little cores, which (starting with Alder Lake) will finally now have 256-bit AVX/AVX2.
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