AMD Linux Graphics Driver Seeing More Patches Around Multi-XCC Support

[phoronix]

Phoronix: AMD Linux Graphics Driver Seeing More Patches Around Multi-XCC Support

The AMDGPU kernel driver patch flow has ticked up in recent days with working on new hardware support/features...

https://www.phoronix.com/news/AMDGPU-Multi-XCC-Patches

[boxie]

As I am not familiar with XCC programming and Multi-XCC (and quick google didn't lead to anything obvious) - Can someone give a quick rundown on what it is used for?

[Sethox]

As I am not familiar with XCC programming and Multi-XCC (and quick google didn't lead to anything obvious) - Can someone give a quick rundown on what it is used for?

XCC is deliberately analogous to GCC and imitates many of its behaviours. XCC is a wrapper around a collection of tools to make the use of those tools simpler. Those tools perform the steps of preprocessing, compilation (both C/C++ and XC), assembly and ‘mapping’. Those tools may be used individually, but are more easily used via xcc.

XCC will normally run all of the steps. The first three steps are similar to GCC in that they are applied to an individual source file to produce an object file. The ‘mapping’ step, as the name suggests, is different. Rather than producing an executable for a single processor, the linker is invoked multiple times to produce an executable per processor. Furthermore, the process includes auto-generating source code, compiling it and invoking the linker further times. The resulting single output file is an XE file , which contains the multiple executables.

https://www.xmos.ai/documentation/XM-014363-PC-6/html/tools-guide/tools-ref/cmd-line-tools/xcc-manual/xcc-manual.html

If I understand it right, it's another type of linker. That is if it's even the XCC terminology context the article is talking about.

[baka0815]

As I am not familiar with XCC programming and Multi-XCC (and quick google didn't lead to anything obvious) - Can someone give a quick rundown on what it is used for?

I found something about XCC in a Saphire Rapids article (https://www.hardwareluxx.de/index.ph...leunigern.html, German) which interpretes this as "Extreme Core Count". But that doesn't make much sense with the "multi" prefix.

Another thing I found is a Lenovo article mentioning an "XClarity Controller" as a new server management-controller replacing Baseboard Management Controller (BMC) (https://sysmgt.lenovofiles.com/help/...s.management.x cc.amd.doc%2Fdw1lm_c_ch1_introduction.html). That could lead in the right direction, but none of the patches mention Lenovo, so it's probably not it.

Michael refers to it as "This all appears to be as part of their multiple graphics chiplets/tiles handling."

[boxie]

Interesting Sleuthing

I found something about XCC in a Saphire Rapids article (https://www.hardwareluxx.de/index.ph...leunigern.html, German) which interpretes this as "Extreme Core Count". But that doesn't make much sense with the "multi" prefix.

Nor with it being in the AMDGPU section of the kernel

Another thing I found is a Lenovo article mentioning an "XClarity Controller" as a new server management-controller replacing Baseboard Management Controller (BMC) (https://sysmgt.lenovofiles.com/help/...s.management.x cc.amd.doc%2Fdw1lm_c_ch1_introduction.html). That could lead in the right direction, but none of the patches mention Lenovo, so it's probably not it.

Again, BMC would not need to program a GPU via the kernels AMDGPU driver

Michael refers to it as "This all appears to be as part of their multiple graphics chiplets/tiles handling."

The best interpretation I have (and I might be totally wrong) is it is a programming model for HPC. I think Sethox might be on the right track here with that set of programming tools that makes it easy to run code over several nodes.

[coder]

I'm pretty sure XCC is an internal codename AMD is using for something in its GPUs. As Michael has documented, they've switched over from using model names to unit names, in their enablement. As such, it's anyone's guess what it really means.

The first letter is probably short for:

• eXtensible
• eXternal
• eXtreme
• cross

The second letter might mean:

• Cache
• Compute
• Communication
• Cross
• Coherency

The last letter could represent:

• Controller
• Complex
• Cache

Because it's referring to adding support for multiple of these, we have to consider that it's probably something that make sense (and might already exist) in singular form. Initially, I'd have put my money on eXtensible Cache Controller, but with low confidence. Upon glancing at one of the patches, I'm now leaning towards something like eXtreme Compute Complex, since this bit of queue setup suggests the xcc_id is an index over XCD's (where I presume the D -> Die):

for (xcc_id = 0; xcc_id < adev->gfx.num_xcd; xcc_id++)

There's also many mentions of "rings", which I presume refers to the communication bus topology. So, it might indeed refer to a communication block that's simply instantiated once per compute die.

[dragorth]

Isn't AMD using a "chiplet" structure, based on using multiple dies and die technologies to create a product, strategy on both its CPUs and GPUs? Wouldn't this be describing the different function units on the GPUs, possibly made with varying die techs to reduce cost? That is why they are able to bring up different parts of the chiplets at a time.

It is very cool tech and ideas, frankly.

[coder]

Isn't AMD using a "chiplet" structure, based on using multiple dies and die technologies to create a product, strategy on both its CPUs and GPUs? Wouldn't this be describing the different function units on the GPUs, possibly made with varying die techs to reduce cost?

This has some detail, including photos which appear to show a lot more than the claimed "13 chiplets" (I count 20 distinct dies):

https://www.tomshardware.com/news/am...on-transistors

That is why they are able to bring up different parts of the chiplets at a time.

As Michael has reported, their bring-up has transitioned to the granularity of logical IP blocks for a little while, already. So, things like the video codec block. It's much finer than at the granularity of whole dies.