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RadeonSI Picks Up Primitive Culling With Async Compute For Performance Wins

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  • #61
    Originally posted by Michael View Post
    Not seeing much of a difference in gaming tests: https://twitter.com/phoronix/status/1095825661556654080
    Did you test with the kernel from amd-staging-drm-next and LLVM 8.0 from the svn release branch or newer? You need both, otherwise the optimization will be silently disabled.

    Run: AMD_DEBUG=info glxgears|grep -e ordered -e scheduled

    You should see:
    has_gds_ordered_append = 1
    has_scheduled_fence_dependency = 1

    The original Mesa branch broke mplayer and mpv. The latest version is fixed.

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    • #62
      Originally posted by marek View Post

      Did you test with the kernel from amd-staging-drm-next and LLVM 8.0 from the svn release branch or newer? You need both, otherwise the optimization will be silently disabled.

      Run: AMD_DEBUG=info glxgears|grep -e ordered -e scheduled

      You should see:
      has_gds_ordered_append = 1
      has_scheduled_fence_dependency = 1

      The original Mesa branch broke mplayer and mpv. The latest version is fixed.
      I did with the very latest LLVM 8.0 bits but not with amd-staging-drm-next, wasn't aware newer kernel bits were needed so was using Linux 5.0. Looks like I'll re-test in the morning.
      Michael Larabel
      https://www.michaellarabel.com/

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      • #63
        Originally posted by coder View Post
        Could be worse. I read that Pixar's RenderMan would tessellate well below the size of a pixel - until the triangle was too small to influence the color of the pixel.
        A triangle has to intersect at least 1 sample point to be visible. Even with 8x MSAA, if a triangle falls exactly in the empty space between sample points, it's invisible (it doesn't contribute to the color).

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        • #64
          Originally posted by Michael View Post
          I did with the very latest LLVM 8.0 bits but not with amd-staging-drm-next, wasn't aware newer kernel bits were needed so was using Linux 5.0. Looks like I'll re-test in the morning.
          Probably best to start by reproducing the Paraview result. That way, you know all the correct bits are in place.

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          • #65
            Originally posted by marek View Post

            Did you test with the kernel from amd-staging-drm-next and LLVM 8.0 from the svn release branch or newer? You need both, otherwise the optimization will be silently disabled.

            Run: AMD_DEBUG=info glxgears|grep -e ordered -e scheduled

            You should see:
            has_gds_ordered_append = 1
            has_scheduled_fence_dependency = 1

            The original Mesa branch broke mplayer and mpv. The latest version is fixed.
            I confirm the mpv bug indeed, and also had has_gds_ordered_append = 1/has_scheduled_fence_dependency = 1 on terminal, but at least in unigine benchmarks I had no difference, gonna test more tomorrow with the newer code.

            Comment


            • #66
              Originally posted by smitty3268 View Post

              Looking at the code, it just looks for "PRO" anywhere in the cards marketing name.
              yeah, typical laptops like my Dell:

              01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Saturn XT [FirePro M6100]

              So that code path would trigger for this CIK chip,

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              • #67
                Wondering what couple of Radeon Instinct MI60 could do there

                Hm, are APUs supported by these patches?
                Last edited by dungeon; 14 February 2019, 03:03 AM.

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                • #68
                  Originally posted by marek View Post

                  Environment variable.
                  Thank you very much

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                  • #69
                    Originally posted by dungeon View Post
                    Wondering what couple of Radeon Instinct MI60 could do there

                    Hm, are APUs supported by these patches?
                    Yeah that would be awesome,
                    I think that Marek talked about GCN 1.1 Sea Islands or above..

                    Kavery APUs have 8 ACEs units I think..?
                    I don't know if they have 2 dma units( for bidireccional usage), but I believe so, has they use System Ram memory, as main memory

                    Can Someone more Educated, on the matter than me, help on this questions?

                    Comment


                    • #70
                      Originally posted by clapbr View Post

                      I confirm the mpv bug indeed, and also had has_gds_ordered_append = 1/has_scheduled_fence_dependency = 1 on terminal, but at least in unigine benchmarks I had no difference, gonna test more tomorrow with the newer code.
                      Hello clapbr,

                      have a look, here:


                      Greetings,
                      Dieter

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