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Intel Continues Prepping The Linux Kernel For X86S

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  • #11
    Originally posted by sobrus View Post
    Long time ago, I had an Amiga, and though how shitty x86 is.
    Years have passed, and so many less shitty architectures already bite the dust. 86k, 88k, Alpha, MIPS, Sparc, Itanium, PowerPC, SuperH to name a few.

    And yet somehow not only x86-64 works while retaining legacy compatibility (think about Apple that had painful 68k->PPC->x86->Arm path), but it's not that much worse than "latest and greatest".

    It's really unfair to compare let's say Apple M3 with x86-64 parts. Apple is expensive, Like $2000 pro laptop with 8GB of RAM in 2024.
    They can use 3nm process, and throw a lot of silicon while keeping voltage and frequency low, because they will make profit anyway.
    Ryzen 5950x has 8B transistors. RX6900XT has 26B including huge cache. Apple M3 Max has 92B. This is much more than 4090 has.
    It's not architecture that makes the difference, but money. PC parts are always overclocked far too much to save on silicon. For example RDNA2 chips should never exceed ~2,2Ghz. They are painfully inefficient above that. Same story with Ryzens (series 5000 should run at around 4,5-4.7Ghz max even when undervolted)

    I'm not a fan of x86, I just don't care anymore, as long as it works as intended. I doubt there will be any miracles if we go ARM or RISCV. x86 cores are very efficient nowadays. But there will be problems for sure, if you want to use older software.
    What actually is unfair and makes just no sense is comparing the whole M chip with an x86 CPU or a GPU. Inside an M3 Max chip you have at least 10 CPU cores (I don't think there's a model with less), a GPU, an NPU, the secure enclave, various hardware accelerators including ProRes that nobody else supports, ISP and some HDR video processor. And some additional x86 transistors. Sure, some of that is also inside CPUs or GPUs, but that's it. M Chips are closer to smartphone SoCs then to your usual laptop SoC.

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    • #12
      Originally posted by zboszor View Post
      What about running FreeDOS and all the legacy DOS software?
      QEMU. There's no need to run FreeDOS natively anywhere that's not ancient hardware.

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      • #13
        To all those supporting x86S, I am not saying that it is worse than x86_64. I am saying that, both ISAs are inherently bad (I can elaborate that, if people are interested in it), compared to other architectures. So, the only reason to use/implement any of the two, is backwards compatibility. If you are willing to sacrifice that (I am all in for that btw), why go for x86S and not something better?
        Last edited by marios; 12 March 2024, 08:51 AM.

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        • #14
          Originally posted by marios View Post
          To all those supporting x86S, I am not saying that it is worse than x86_64. I am saying that, both ISAs are inherently bad (I can elaborate that, if people are interested in it), compared to other architectures. So, the only reason to use/implement any of the two, is backwards compatibility. If you are willing to sacrifice that (I am all in for that btw), why go for x86S and not something better?
          I'd be interested!

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          • #15
            Originally posted by marios View Post
            To all those supporting x86S, I am not saying that it is worse than x86_64. I am saying that, both ISAs are inherently bad (I can elaborate that, if people are interested in it), compared to other architectures. So, the only reason to use/implement any of the two, is backwards compatibility. If you are willing to sacrifice that (I am all in for that btw), why go for x86S and not something better?
            Isn't the 64-bit mode backwards compatible? Most x86 systems have been 64-bit for ~20 years.

            ARM SoCs aren't compatible either. You need custom initialization code for every platform even they both have the same ISA. This is no different. The same 64-bit userspace should work. This is exactly how the ARM 32/64-bit land works.

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            • #16
              Originally posted by marios View Post
              To all those supporting x86S, I am not saying that it is worse than x86_64. I am saying that, both ISAs are inherently bad (I can elaborate that, if people are interested in it), compared to other architectures. So, the only reason to use/implement any of the two, is backwards compatibility. If you are willing to sacrifice that (I am all in for that btw), why go for x86S and not something better?
              And this is inherently wrong. If you like it or not, it has been around for many decades and there has yet to be any architecture that can replace x86 alltogether. I'm not saying that I wouldn't love that because that's how progress works. Just that we aren't there yet. But the main issue is that still too much stuff is done by generic processing units like CPUs and GPUs, while the goal is to have optimized processing units to reach any degree of performance without drawing power like crazy. With hardware accelerators of various kinds we are going in the right direction, but it's still a long way to go.

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              • #17
                Originally posted by Artim View Post

                What actually is unfair and makes just no sense is comparing the whole M chip with an x86 CPU or a GPU. Inside an M3 Max chip you have at least 10 CPU cores (I don't think there's a model with less), a GPU, an NPU, the secure enclave, various hardware accelerators including ProRes that nobody else supports, ISP and some HDR video processor. And some additional x86 transistors. Sure, some of that is also inside CPUs or GPUs, but that's it. M Chips are closer to smartphone SoCs then to your usual laptop SoC.
                That's why I've included GPUs as well. With 92B transistor budget, you can throw 64 Zen3 cores including 4 SoCs, and 3xRX6900XT on top of that (excluding ~7B Infiinty cache for each chip). And GPUs have also hardware video encoders/decoders. R5950x also has integrated SoC.
                With 92B budget without GPU you could implement 11 x 16 core 32 thread Ryzens. That's a lot of silicon. And all this in a laptop chip. M3 is a 3nm part with only 4.0Ghz max frequency. Underclock and undervolt any current x86 (not even 3nm) core to match this and see how efficient it becomes.
                But when we'll see 3nm PC chips, they will most likely target near 6Ghz frequencies. Sadly.

                Speaking of more recent PC parts, 92B would allow to implement two 7950x ryzens, a 7900XTX,a nd there will be almost enough transistors left to put another 7900XT. In a laptop chip.
                Last edited by sobrus; 12 March 2024, 09:29 AM.

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                • #18
                  Originally posted by sobrus View Post

                  That's why I've included GPUs as well. With 92B transistor count, you can throw 64 Zen3 cores including 4 SoCs, and 3xRX6900XT on top of that (excluding ~7B Infiinty cache for each chip). And GPUs have also hardware video encoders/decoders. R5950x also has integrated SoC. M3 is nothing out of ordinary, they just added AV1 decode (but not encode) to it .
                  With 92B budget you can implement 11 x 16 core Ryzens. That's a lot of silicon. And all this in a laptop chip. M3 is a 3nm part with only 4.0Ghz max frequency. Underclock and undervolt any current x86 (not even 3nm) core to match this and see how efficient it become.
                  Just shows you how inefficient the ARM design can be if you need 8 times the transistor count to barely be able to compete.

                  Also, your numbers are very off. A Ryzen 9 7950X has a bit over 13B transistors. No idea how you want to fit 11 of those inside a 92B budget.

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                  • #19
                    Originally posted by Artim View Post

                    Just shows you how inefficient the ARM design can be if you need 8 times the transistor count to barely be able to compete.

                    Also, your numbers are very off. A Ryzen 9 7950X has a bit over 13B transistors. No idea how you want to fit 11 of those inside a 92B budget.
                    I was speaking about 5950x, which has a bit over 8B count. But ARM it's not inefficient, they use the transistor budget to get performance of a 5+Ghz chip using only 4Ghz - at a fraction of power.

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                    • #20
                      Originally posted by sobrus View Post

                      I was speaking about 5950x, which has a bit over 8B count. But ARM it's not inefficient, they use the transistor budget to get performance of a 5+Ghz chip using only 4Ghz - at a fraction of power.
                      It is very inefficient if you need that much more silicon to be able to barely compete. The first M chip may have been better in some limited use cases then any other chip at that time, but those times are already long gone.

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