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The Incredible Performance & Power Efficiency Of AMD Zen 1 vs. Zen 4C

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  • #11
    Originally posted by rene View Post
    yeah, AMD's effectively Big.little zen4 / zen4c setup makes so much more sense than Intel's - https://www.youtube.com/watch?v=18CXFvjuH-g I hope they use that for high end desktop CPUs for Zen5, too, ...! e.g. 4 high perf boosting zen5, and 16 lower clocking zen5c cores ;-)!
    absolutely right what intel does is complete nonsense they have cpus who some cores have hyperthreating some have not

    2 different ISAs and both ISAs are inferior to AMDs solution... AMD only use 1 ISA and its ISA implementation of AVX512 is superior.

    the cpu scheduling for intel cpus is a mission impossible because you never know what your threat needs until someone profiled it manually

    on AMD side instead they have simple scheduler if there are many cache misses they move it on cpu with 3D cache or go from Zen4c to Zen4 it is so simple because cache is the only real difference.

    i had many discussion here on phoronix about zen4c is bad and steam deck should not use it and so one... then a intel soc 155 steam deck competitor comes out and AMDs competitor solution litterally annihilate the intel solution.

    "4 high perf boosting zen5, and 16 lower clocking zen5c cores"

    they will never produce something like this because the lowest core count per chiplet they produce is 8cores

    so you can have 8core zen5+ 16core zen4c makes it a 24 core design.
    but i have bad news:

    "I hope they use that for high end desktop CPUs for Zen5, too"

    AMD does not believe in zen5c on the desktop.... on the AM5 desktop platform they will only do 16cores zen5 maybe 8cores of them get 3D cache.
    Phantom circuit Sequence Reducer Dyslexia

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    • #12
      When Zen 1 released, we were all astonished at the performance it offered. Seven years later, Zen 4 makes Zen 1 look bad. Not too shocking, although again, it does show the advantages which can be provided by hardware specifically optimised for certain tasks, when coupled with software which can take advantage. We are seeing the same with Intel's new AMX extensions (much better performance in optimised code with CPUs supporting AMX), will surely with APX, and I wonder for how long AMD will be crippled by the "new instruction set" game we have seen play out repeatedly.

      As others have talked about Zen4/4c combinations, I'll add my thoughts on that, for what they're worth. I dislike the heterogeneous core concept for desktops or servers; I can see the justification for always on mobile devices, where having the ability to have one or two ultra-low-power cores just keeping things ticking over when idle while the higher power cores are turned off, but for desktops and servers I'm less enthused. The way Intel "handled" heterogeneous cores seems designed to cause headaches, mixing architectures and instruction sets just makes everything horribly complicated. The AMD approach of less cache, less clockspeed, same ISA seems the only sane one for desktop or server.

      Originally posted by Article
      ...but if you really are still relying on EPYC 7601 series in production, it really is past time to consider upgrading.
      Yeah, if you either have (a) a bottomless budget or (b) get the kit for free. The places where Zen 1 really falls down compared to Zen 4c are areas where GPUs still really rule the roost, in which case you'd likely have already invested in the GPU solution. Transitioning from a Zen 1 server to a Zen 4 server is a full platform jump, and DDR5 still carries a premium at higher capacities... at least in Japan, so any upgrade is "buy everything new, again". Well, at least that way the older kit can be kept for other tasks (or an emergency backup) rather than a collection of CPUs sitting around idle, or contributing to the ever increasing quantity of difficult (to near impossible) to recycle e-waste.

      We still have a large array of GPUs in service going back to Pascal architecture. Sure, a Pascal generation card isn't going to set the world on fire in performance terms but I was quite pleased to see a P6000 happily hammer through some GNN processing over the last week or two. OK, so it's faster on an A6000 (quite a lot faster) but we can get some smaller things crunching on the older cards while the newer, faster ones focus on larger datasets (and still take 11 days to do it!).

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      • #13
        This is a fantastic review, well done.

        Proof that AMD's EPP approach is results driven and when we see a compare to Intel's latest P/E Xeon, we will know where the value lies as well.

        Corporate datacenter cycles can run anywhere from 4-6 years, so this one will definitely put a dent in the next refresh cycle for Intel houses of compute.

        My only concern is with the status of VMWare. The disruption being created in corporate markets by the new capricious pricing schemes from Broadcom is causing major rethinking in future spends. Companies that have tremendous investments in hardware and toolsets optimized for VMWare are currently going through a strategic rethink of where they are going to go.

        If Broadcom over sucks the blood from the turnip, companies will defer new server spends for at least a year as they sort out their retooling approach. In the interim, they will force themselves to go on major VM attrition/diets before making their next server platform commitment. These new Zen 4C platforms may not get the deserved sales in the corporate space, at least not until 2025.

        2024 is most definitely going to be an interesting year.

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        • #14
          What I would like to see, either from AMD or Intel, or even Nvidia when they release their ARM CPUs, is a desktop CPU with 100 or so relatively small cores, no SMT, ECC support, very low clock speed, something like 1Ghz, and a hardware thread scheduler.

          I think that would be great.

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          • #15
            Originally posted by sophisticles View Post
            I think that would be great.
            It would flop. Especially on the desktop where you have multitude of single threaded tasks that are latency sensitive.
            See what Sun did with their UltraSparc T1 "Niagara" processors back in the day. They were only usable for a very niche use cases in the server area.

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            • #16
              Originally posted by qarium View Post

              absolutely right what intel does is complete nonsense they have cpus who some cores have hyperthreating some have not

              2 different ISAs and both ISAs are inferior to AMDs solution... AMD only use 1 ISA and its ISA implementation of AVX512 is superior.

              the cpu scheduling for intel cpus is a mission impossible because you never know what your threat needs until someone profiled it manually

              on AMD side instead they have simple scheduler if there are many cache misses they move it on cpu with 3D cache or go from Zen4c to Zen4 it is so simple because cache is the only real difference.

              i had many discussion here on phoronix about zen4c is bad and steam deck should not use it and so one... then a intel soc 155 steam deck competitor comes out and AMDs competitor solution litterally annihilate the intel solution.

              "4 high perf boosting zen5, and 16 lower clocking zen5c cores"

              they will never produce something like this because the lowest core count per chiplet they produce is 8cores

              so you can have 8core zen5+ 16core zen4c makes it a 24 core design.
              but i have bad news:

              "I hope they use that for high end desktop CPUs for Zen5, too"

              AMD does not believe in zen5c on the desktop.... on the AM5 desktop platform they will only do 16cores zen5 maybe 8cores of them get 3D cache.
              That would be a shame. But maybe Zen5 design was also already further along in the design state. At some point in time I believe we will see Zc cores on desktop. If not w/ Zen 5, then Zen 6. It just makes so much more sense to only include N high perf optimized cores if only N can turbo boost to the highest freq at a given time.

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              • #17
                Originally posted by Paradigm Shifter View Post
                When Zen 1 released, we were all astonished at the performance it offered.
                ...
                We were astonished that AMD basically pulled performance parity with intel out of seemingly nowhere, at a time when they looked to be struggling to tread water. Zen2 and intel's response of just adding more cores power be damned is when things really started heating up.

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                • #18
                  Originally posted by qarium View Post
                  AMD does not believe in zen5c on the desktop.... on the AM5 desktop platform they will only do 16cores zen5 maybe 8cores of them get 3D cache.
                  It's not about believing in something. AMD just don't have to use dense cores yet, because they are competitive in MT with the current core config. That's all. Why to invest extra money into a new product series when you are already competitive with Intel hybrid garbage.

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                  • #19
                    Originally posted by rene View Post
                    At some point in time I believe we will see Zc cores on desktop. If not w/ Zen 5, then Zen 6. It just makes so much more sense to only include N high perf optimized cores if only N can turbo boost to the highest freq at a given time.
                    The upcoming (availability starting at the end of this month) Ryzens 8000 series APUs already do mixed core types on the desktop AM5 platform:

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                    • #20
                      Originally posted by user556 View Post
                      AMD only has relative reduction of L3 cache and slightly reduced clock rate. It gains notable real efficiency. IPC, threading, and instruction set are untouched. Interestingly, AMD still has theoretical option for stacked cache here. Lower power means easier to do.
                      As of Zen 4c they are not able to use stacked cache because the Through-Silicon Vias (TSV) used to connect the cache chiplet were removed from its design. A hybrid design like 7950X3D might be feasible with one Zen 4 chiplet having 3D cache and the other being Zen 4c without 3D cache.

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