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The Incredible Performance & Power Efficiency Of AMD Zen 1 vs. Zen 4C

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  • The Incredible Performance & Power Efficiency Of AMD Zen 1 vs. Zen 4C

    Phoronix: The Incredible Performance & Power Efficiency Of AMD Zen 1 vs. Zen 4C

    While we are beginning to see AMD Zen 4C cores in client systems, these smaller cores have already proven themselves very interesting and capable with the AMD EPYC Bergamo high core count server processors and the extremely power efficient EPYC 8004 "Siena" processors. For showing how far Zen has come in power efficiency, I thought it would be fun to show how the original flagship EPYC 7601 "Zen 1" processor with 32-cores / 64-threads compared to Zen 4C with the EPYC 8324P(N) 32-core processors. But as that isn't even the top-end Siena part, I also tossed in the 64-core EPYC 8534PN too for a top of stack look for the current EPYC 8004 line-up.

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    Pretty remarkable how much things have improved. Zen4c is pretty much twice as good, even more if you account for power consumption.

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    • #3
      yeah, AMD's effectively Big.little zen4 / zen4c setup makes so much more sense than Intel's - https://www.youtube.com/watch?v=18CXFvjuH-g I hope they use that for high end desktop CPUs for Zen5, too, ...! e.g. 4 high perf boosting zen5, and 16 lower clocking zen5c cores ;-)!

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      • #4
        Interesting, I recently switched to Milan-X for a server at home, and while performance is nice, idle power is not. This seems promising, and not too expensive. Can't really find any motherboards available though, so pricing on that is a bit vague. Anyway, nice to keep in my mind for a future upgrade.

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        • #5
          That's far from the best Globalfoundries' 14nm node vs TSMC's N5 node as well, so it's not just an architectural improvement alone. Zen 1 on the latter node would also look a ton better.

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          • #6
            Michael

            Gotta butt in with a typo on page 2

            "Of course, if going with Genoa(X) and Bergamo the performance difference is simply mind-boggling but for thos article is mainly focused on core-for-core difference and then the EPYC 8534PN run for additional context."

            Should probably be "but this".



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            • #7
              Originally posted by rene View Post
              4 high perf boosting zen5, and 16 lower clocking zen5c cores
              Eight of each would make more sense.

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              • #8
                Originally posted by rene View Post
                yeah, AMD's effectively Big.little zen4 / zen4c setup makes so much more sense than Intel's - https://www.youtube.com/watch?v=18CXFvjuH-g I hope they use that for high end desktop CPUs for Zen5, too, ...! e.g. 4 high perf boosting zen5, and 16 lower clocking zen5c cores ;-)!
                Well, Intel cores are much more "big.LITTLE" than AMD cores, but still big.LITTLE is a purely ARM thing where big cores are usually out-of-order and little cores are in-order. It is still a much different way from either both Intel (Performance/Efficient) and AMD (optimized for speed/optimized for size) approaches.

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                • #9
                  Originally posted by Type44Q View Post
                  Eight of each would make more sense.
                  not really, so far on AMD's cpus only a handful of cores single core boos to the highest freq. So optimizing more than a handful for highest freq is a waste of silicon space unless you want a handful for process variation yield issues.

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                  • #10
                    The two approaches aren't even comparable at all. Intel's approach is busted. Not only is performance nerf'd with reduced IPC, reduced cache, missing threading, the instruction set is sliced and diced too!!

                    AMD only has relative reduction of L3 cache and slightly reduced clock rate. It gains notable real efficiency. IPC, threading, and instruction set are untouched. Interestingly, AMD still has theoretical option for stacked cache here. Lower power means easier to do.

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