Originally posted by rene
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2 different ISAs and both ISAs are inferior to AMDs solution... AMD only use 1 ISA and its ISA implementation of AVX512 is superior.
the cpu scheduling for intel cpus is a mission impossible because you never know what your threat needs until someone profiled it manually
on AMD side instead they have simple scheduler if there are many cache misses they move it on cpu with 3D cache or go from Zen4c to Zen4 it is so simple because cache is the only real difference.
i had many discussion here on phoronix about zen4c is bad and steam deck should not use it and so one... then a intel soc 155 steam deck competitor comes out and AMDs competitor solution litterally annihilate the intel solution.
"4 high perf boosting zen5, and 16 lower clocking zen5c cores"
they will never produce something like this because the lowest core count per chiplet they produce is 8cores
so you can have 8core zen5+ 16core zen4c makes it a 24 core design.
but i have bad news:
"I hope they use that for high end desktop CPUs for Zen5, too"
AMD does not believe in zen5c on the desktop.... on the AM5 desktop platform they will only do 16cores zen5 maybe 8cores of them get 3D cache.
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