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AMD Proposes An FPGA Subsystem User-Space Interface For Linux

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  • AMD Proposes An FPGA Subsystem User-Space Interface For Linux

    Phoronix: AMD Proposes An FPGA Subsystem User-Space Interface For Linux

    AMD engineers are proposing an FPGA Subsystem User-Space Interface to overcome current limitations of the Linux kernel's FPGA manager subsystem...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    It'd be amazing if we could also get some open source usespace tools for programming them.

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    • #3
      Originally posted by coder View Post
      It'd be amazing if we could also get some open source usespace tools for programming them.
      If in not entirely wrong, most FPGAs user external ROM in flash, so technically dd could do it. Maybe some lock-bit has to be cleared first.
      or do you mean develop software for the FPGAs? Both xilinx and altera have free (or trial) versions - at least used to have like 10 years ago when I did some FPGA programming
      Last edited by and.elf; 04 January 2024, 04:13 PM. Reason: Fix after auto-correct

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      • #4
        Are the XDNA AI subprocessors / NPUs in some of AMDs new chips a kind of FPGA?

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        • #5
          Originally posted by plipt View Post
          Are the XDNA AI subprocessors / NPUs in some of AMDs new chips a kind of FPGA?
          Yes, that's what 8 read multiple times, see a random quote bellow.
          From what i understood, it is fpga based, but does not seem freely programable.

          "AMD has rapidly integrated the FPGA technology it acquired with Xilinx last year to integrate a new FPGA-based AI engine directly into the die of the new 7040 series processors."

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          • #6
            Originally posted by plipt View Post
            Are the XDNA AI subprocessors / NPUs in some of AMDs new chips a kind of FPGA?
            No. The IP came from Xilinx, but is not a FPGA in any sense.

            It's described in quite a lot of detail, here:

            Search for the section titled XDNA AI Engine. It's basically an array of 16 VLIW DSP cores. Here's the block diagram of one tile.

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            • #7
              Originally posted by b8e5n View Post
              Yes, that's what 8 read multiple times, see a random quote bellow.
              From what i understood, it is fpga based, but does not seem freely programable.

              "AMD has rapidly integrated the FPGA technology it acquired with Xilinx last year to integrate a new FPGA-based AI engine directly into the die of the new 7040 series processors."
              https://www.tomshardware.com/news/am...phoenix-arrive
              No, that site is good for certain things (mostly news & benchmarks), but the only time you get detailed information from them is when they're regurgitating information fed to them by a company. It's not the place to go for in-depth analysis.

              In this case, they simply made a presumption that because the IP came from Xilinx, a FPGA company, that it's probably somehow FPGA-based. However, Xilinx also has blocks of hard-wired logic, in some of their chips.

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              • #8
                Next step is actual drivers.

                Originally posted by gregkh
                But really, we need to see some code before we can go further. "proposals" are great, but that's not how kernel development works, we need actual patches to be able to evaluate anything, as that shows you at least have a working implementation to start with, and that you have resolved any of the obvious issues ahead of time.
                ‚Äč

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                • #9
                  Would be interesting to see how this goes hand in hand with their risc-v soft-core processor for fpga.

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