Intel Innovation 2023 Kicks Off With Meteor Lake & Emerald Rapids Launch Date: 14 Dec

[phoronix]

Phoronix: Intel Innovation 2023 Kicks Off With Meteor Lake & Emerald Rapids Launch Date: 14 Dec

Intel is kicking off their Innovation 2023 conference in San Jose with many exciting announcements. Freed from embargo this morning is news around their upcoming mobile and server processors, lots of AI talk, Intel's continued software advancements to complement their hardware, and more...

https://www.phoronix.com/news/Intel-Innovation-2023

[S.Pam]

I must admit that I always found Intel's naming schemes really difficult to remember. I mean, it's not easy to remember which is the most recent lake, or in which order they come. Combined with a selection of coves and meteors, it makes it quite confusing....

[M@GOid]

I must admit that I always found Intel's naming schemes really difficult to remember. I mean, it's not easy to remember which is the most recent lake, or in which order they come. Combined with a selection of coves and meteors, it makes it quite confusing....

+1. I hate those things. Incremental numbering still is the way to go.

[M@GOid]

- Intel is demonstrating the first multi-chiplet package making use of the Universal Chiplet Interconnect Express (UCIe) interconnects.

So nice that Intel finally recognizes the correct term is Chiplet, not Tiles.

[coder]

I must admit that I always found Intel's naming schemes really difficult to remember. I mean, it's not easy to remember which is the most recent lake, or in which order they come. Combined with a selection of coves and meteors, it makes it quite confusing....

I feel your pain, however the Cove/Mont thing was actually quite a good move, as it separates the names of the core microarchitecture from the CPU containing it.

CPUs:

• Starting in 2023, Lake now seems specific to consumer CPUs.
• Rapids -> Xeon, P-core only (ex: Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids)
• Forrest -> Xeon, E-core only (ex: Sierra Forest, Clearwater Forrest)

As for the cores:

• Cove -> P-core (ex: Golden Cove, Raptor Cove, Redwood Cove)
• Mont -> E-core (ex: Gracemont, Crestmont, Skymont)

Now, we can say that Intel doesn't need to change something very much, in order to grant it a new name. For example, Raptor Cove seems to improve on Golden Cove mainly though an enlarged L2 cache. Any other tweaks seem too minor to mention. However, Intel didn't bother to rename the Gracemont E-cores, featured in both Alder Lake and Raptor Lake.

[coder]

So nice that Intel finally recognizes the correct term is Chiplet, not Tiles.

UCIe is the name of an industry standard -- not an Intel-specific technology.

Honestly, the chiplet vs. tile thing doesn't bother me even a tiny bit. What I care about are things like wire density, frequency, manufacturing cost, efficiency (pJ/b), thermal conductivity, and reliability. What they happen to call their technology is, by far, the least important or consequential aspect.

[mangeek]

This is a really exciting design! I've wanted something like this for a long time, and Intel exceeded my expectations.

I'm really excited to see if they offer some wider diversity with the design in terms of some chips that have only a SoC chiplet with Graphics (2 E-cores), or a SoC chiplet coupled with a very small CPU chiplet (maybe just 4 E-cores, for a total of 6 Es?), and still a beefy Graphics chiplet. I think the latter would be perfect for casual consumer laptops.

I can imagine this scaling really well, too; from set-top boxes and embedded thingamajigs up to high-performance workstations. Bonus points if they can make a 'one piece' part for low-to-mid laptops that includes 16GB of high-speed chiplet-based RAM, letting system builders cut memory traces and real estate totally out of their designs.

[coder]

Bonus points if they can make a 'one piece' part for low-to-mid laptops that includes 16GB of high-speed chiplet-based RAM, letting system builders cut memory traces and real estate totally out of their designs.

They have shown something similar to Apple's M-series:

https://www.extremetech.com/computing/intels-meteor-lake-cpus-to-offer-on-package-lpddr5x-memory

However, you don't have to wait for Meteor Lake, to get that. ASUS and Intel first developed it for Raptor Lake, which is now available in some of their OLED laptops:

https://wccftech.com/asus-intel-supernova-som-chip-zenbook-pro-x16-oled-laptop-38-percent-size-reduction/

https://backendnews.net/asus-business-unveils-asus-expertbook-b9-oled/

[vegabook]

[QUOTE=coder;n1410580]
They have shown something similar to Apple's M-series:

https://www.extremetech.com/computin...lpddr5x-memory

Do the iGPUs benefit, Apple style, from genuine, no-copy, shared memory architecture too? Or do they still compartmentalize the RAM?

[coder]

[QUOTE=vegabook;n1410638]

Do the iGPUs benefit, Apple style, from genuine, no-copy, shared memory architecture too? Or do they still compartmentalize the RAM?

I can't speak to their software, but I believe the iGPU hardware should use a MMU, for security reasons. That should also facilitate true shared memory (i.e. SVM).

The main benefit iGPUs probably get from on-package RAM is that you can clock it higher. For instance, the 128-bit LPDDR5X-7500 has a nominal bandwidth of around 120 GB/s, which is faster than the 112 GB/s you get on a Nvidia GTX 1050 Ti dGPU, which used 128-bit GDDR5-7000.

Of course, Meteor Lake's iGPU needs to share that bandwidth pie with its CPU cores, but it tells you that even with the equivalent of a modest 2-DIMM memory configuration, we're getting into some pretty serious bandwidth.