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Cannonlake Onboarding Posted For GCC Compiler

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  • Cannonlake Onboarding Posted For GCC Compiler

    Phoronix: Cannonlake Onboarding Posted For GCC Compiler

    An Intel developer is looking to merge the -march=cannonlake support for the GNU Compiler Collection (GCC)...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    I guess that is as close we get to it being official that even consumer cannonlake will have AVX-512

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    • #3
      Awesome, I have put off building a new system because of the AVX-512 benchmarks I have seen from the Purley based Intel cpu's, like the Xeon Gold/Platinum and i9 benchmarks that utilize that beefy 2 FMA per core setup but the best part is that Purley only supports AVX-512 F, these Cannon Lake's will support the whole AVX-512 stack, Intel is about to smack AMD right back to second place.

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      • #4
        AFAIR supposedly Zen2 will have better AVX support

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        • #5
          But very unlikely there will be AVX-512.

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          • #6
            Originally posted by Spooktra View Post
            Awesome, I have put off building a new system because of the AVX-512 benchmarks I have seen from the Purley based Intel cpu's, like the Xeon Gold/Platinum and i9 benchmarks that utilize that beefy 2 FMA per core setup but the best part is that Purley only supports AVX-512 F, these Cannon Lake's will support the whole AVX-512 stack, Intel is about to smack AMD right back to second place.
            They question if the consumer parts will have full bandwidth AVX-512. It is apparently a big heavy part of the Skylake-X and when fired up slows down the clock frequency of the CPU to the point that short functions converted to AVX-512 are sometimes slower than their SSE4 or AVX2 implementation despite doing twice the work per clock.. So maybe Intel will do something where it can only handle one FMA per core per clock instead of two. We will see. Though if we can get AVX-512 at full speed in 128bit or 256bit mode that would still be quite useful for a lot of optimizations.

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