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Intel's Newest Software Effort For Achieving Greater Performance: Thin Layout Optimizer

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  • Intel's Newest Software Effort For Achieving Greater Performance: Thin Layout Optimizer

    Phoronix: Intel's Newest Software Effort For Achieving Greater Performance: Thin Layout Optimizer

    Intel's software team is today sharing their newest innovation for achieving greater performance on Linux systems: the Thin Layout Optimizer. Intel's Thin Layout Optimizer is inspired by the likes of the Meta/LLVM BOLT optimizer and Google's Propeller but aims to be much easier to use while still delivering measurable performance gains for optimized binaries...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    Michael

    Typo

    "Binary Optimization Laoyout Tool" should be "layout"

    Comment


    • #3
      Benchmarks?

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      • #4
        Meanwhile mainstream distros struggle to provide x86-64-v3 and LTO builds -_-

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        • #5
          I wonder how this affects security? Modern binaries have some randomness in their layout to make it harder to exploit them if bugged. Would this put code into a predictable pattern then?

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          • #6
            Originally posted by kylew77 View Post
            I wonder how this affects security? Modern binaries have some randomness in their layout to make it harder to exploit them if bugged. Would this put code into a predictable pattern then?
            Does that happen at the linker or loader level. I thought code was loaded by the linked parts, just moving that code around in the file isn't changing that.

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            • #7
              Originally posted by kylew77 View Post
              I wonder how this affects security? Modern binaries have some randomness in their layout to make it harder to exploit them if bugged. Would this put code into a predictable pattern then?
              The randomization you talk about is on a whole library level ... this is about the order inside the library and does not interfere with the ASLR randomization of the whole library .. it coexists completely

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              • #8
                Those are such good looking machines...

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                • #9
                  That workflow looks significantly easier than BOLT, although you basically have to compile your own binutils unless they get those gnu linker patches upstreamed. So it probably evens out.

                  A bummer for me personally is that AMD CPUs do not support LBR (perf -j flag) until zen3 AFAIK. I personally have a zen2 CPU so I have to rely on
                  Code:
                  llvm-bolt -instrument
                  to experiment with post-link optimizers. LBR is also unavailable in some environments such as VMs AFAIU.

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                  • #10
                    arjan_intel Some blog posts with how-to's for normies like me to use that tool to optimize the Linux Kernel or Mesa would be highly appreciated.

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