dav1d 1.4 Released With More AVX-512 Optimizations, RISC-V & LoongArch CPU Support

[phoronix]

Phoronix: dav1d 1.4 Released With More AVX-512 Optimizations, RISC-V & LoongArch CPU Support

While recent graphics cards support GPU-accelerated AV1 video decoding, for those still relying on dav1d for CPU-based AV1 decode there is now version 1.4 "Road Runner" available that adds support for LoongArch and RISC-V architectures while continuing to further enhance the performance of this open-source AV1 decoder on x86_64 Intel/AMD processors too...

https://www.phoronix.com/news/dav1d-1.4-AV1-Decoder

[ayumu]

Glad to see dav1d has its priorities straight. RISC-V support is the most important going forward..

Dav1d will be running optimally before the standard ISA entirely replaces the legacy ISAs.

[yump]

Even when hardware accelerated decoding is available, it may have trouble with faster-than-realtime playback, especially at higher bitrates. Nvidia apparently is no problem here, but recently I set someone up with a Ryzen 4000 laptop, and it couldn't handle Youtube's 4k60 VP9 at 2x speed any better than my old Haswell i5 desktop.

So adding SIMD optimizations with instruction sets that only exist on CPUs that have hardware decode anyway is not as silly as it may seem at first glance.

[locken2]

Does adding SIMD optimizations with instruction sets that are exclusive to CPUs with hardware decoding make sense considering the challenges of faster-than-realtime playback, especially at higher bitrates?
dinosaur game

[usaga]

Does adding SIMD optimizations with instruction sets that are exclusive to CPUs with hardware decoding make sense considering the challenges of faster-than-realtime playback, especially at higher bitrates?
dinosaur game

Which instruction set do you mean? AVX-512 has been around in a usable form since Ice Lake, long before HW decoding started to ship.
RISC-V chips so far, also don't typically have HW decode from what I've seen.
Do you possibly mean Loongarch? Because I'm not sure if they ship chips with HW decode.

[yump]

Which instruction set do you mean? AVX-512 has been around in a usable form since Ice Lake, long before HW decoding started to ship.
RISC-V chips so far, also don't typically have HW decode from what I've seen.
Do you possibly mean Loongarch? Because I'm not sure if they ship chips with HW decode.

I'm pretty sure you're replying to an AI spambot that recontextualized some phrases from my post.

But in any case, yeah I forgot about Ice Lake. I wonder how much of an install base it has? It feels like it just kind of floundered until Tiger Lake showed up in volume.