Building Debian For RISC-V Currently Relies Upon Nine HiFive Unmatched Boards

[microcode]

Your analogy makes no sense. All I'm saying is that any ISA involving RISC-V isn't going to be a Zen5 killer any time soon.

RISC-V is the ISA. I can't tell if you're getting your words wrong on purpose, or you actually don't understand what you're saying.

Your analogy makes no sense.

The point of an analogy is to reveal something about what it is analogizing... in this case, you making no sense.

There is literally nothing about RISC-V as an ISA which interferes with a microarchitecture similar to Zen 5; in fact, there would be fewer challenges with RISC-V than with AMD64. You are absolutely incoherent, and should think more before writing. Current-generation out of order CPU core designs do not have that much to do with the instruction sets they implement; the main difference in terms of power-performance is in the efficiency of the decoder. RISC-V in fact wins on decoder efficiency, all else being equal, because the instruction encoding types are fewer and involve fewer parameters for equivalent operations... But this is apparently above your head, because you can barely grasp the distinction between microarchitecture and ISA.

[schmidtbag]

RISC-V is the ISA. I can't tell if you're getting your words wrong on purpose, or you actually don't understand what you're saying.

I can't tell if you're so focused on being literal that you're incapable of understanding the underlying point. It's not a hard concept to grasp, but apparently your autism is kicking into overdrive and you can't possibly understand how Zen5 (an architecture loosely based on the x86 ISA) is not going to be handily obsoleted by any CPU architecture based on RISC-V any time soon. I shouldn't have to spell it out for you like that, especially considering others seemed to get it. Was my phrasing the most precise it could have been? No, but it doesn't take a genius to extrapolate.
You remind me of the people who are like "AKSCHULLY electricity doesn't want to follow the path of least resistance, as it has no concept of desire" as if that distinction matters in the slightest.

The point of an analogy is to reveal something about what it is analogizing... in this case, you making no sense.

Makes sense to others. Seems to be more of a problem with your comprehension. Even those who don't agree with me understood what I was trying to say. But go ahead and continue rambling about the obvious differences about architectures and ISA if that makes you feel less stupid.