Originally posted by uid313
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POWER ISA Contributed To Open-Source, OpenPOWER Joining The Linux Foundation
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Originally posted by uid313 View PostPOWER is an old architecture from the 80s.
RISC-V is a much more modern architecture from the 2000s.
Honestly I think it will take a solid decade of real world usage from the moment BOOM or some other 4-wide RISC-V core enters the market before RISC-V gets anywhere near the maturity of POWER and the x86. And by then the Mill or E2 or whatever it is Google is cooking might be ready to ship...
Overall RISC-V is pushed through its open economic model rather then some technological advantage. As FOSS people we support it. But like microkernels vs monolithic kernels, it doesn't mean we're choosing the best tech around. We're just going with the good enough until proven otherwise.
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Originally posted by schmidtbag View PostThis is one of the weirdest threads I've been on in recent memory. Basically everyone is saying the opposite of each other, and with high confidence too.
Now will IBMs release result in anything positive? That is much harder to answer, I suspect it will have a better chance than RISC-V. The reason is pretty simple, I don’t see IBM ditching the architecture thus there will continue to be development of the hardware. Power on a 5nm process would be very interesting.
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Originally posted by ldesnogu View PostFujitsu have dropped SPARC in favor of ARM.
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Originally posted by eltomito View PostHi! I know nothing about Power. Could anybody, please, explain to me, what's good about it? Please, send comments like "Nothing!", "Fuck all!", etc. to >/dev/nuil. I'd like to actually learn something. Thank you!- Per-socket and per-core throughput, especially with multithreading and large caches, which tend to benefit OLTP applications.
- Scalability. P9 scales gluelessly to 16-socket systems.
- I/O. P9 was the first major processor to support PCIe4, and it also supports OpenCAPI and NVlink directly for talking to accelerators.
- Bandwidth. Enterprise-class Power9 goes to 230GB/s of memory bandwidth per socket today, and that's being increased to 650GB/s with the new Power9 AIO chips coming out next year. These are large numbers.
- Openness. This is a pretty new thing, but the entire OpenPower firmware stack is open-source. (The enterprise Power firmware stack is not; those are different machines with higher price tags.)
- Cost. Power is priced rather well now, but historically carried a significant price premium over commodity hardware.
- Weak ecosystem. Lots of things have assembly optimizations for x86. Fewer do for Power. As a result, performance on random open-source apps can be decidedly hit-or-miss.
- Few hardware options. Raptor is doing an amazing job, with reasonable pricing and a true commitment to openness... but it's not like you can just order a Proliant with a Power9 in it.
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Originally posted by ldesnogu View PostBecause you think that because SoftBank has bank in their name, they are a bank? Funny. Anyway ARM is being operated with a very high level of independence from the mother company.
The pressure of US was high, UK/Japan made a very Big Big mistake...
There are only 5 Countries in the world, that can trash International Law, US/Russia/China/UK/France.
US did it with ARM against China, and the world was watching it..
It will hurt ARM a lot( which is nice for the US, bad for Japan/UK ),
It will give MIPS a big chance in the US,
But above all,
It will definitely bring up RISC-V has a way to escape bully situations,
Every single country now Understands that technology is a very Important thing, for them to be Independent..
And even International Law,
That before was considered, as written in Stone,
Is never more..
RISC-V,MIPS will for sure capitalise on that..
Originally posted by ldesnogu View PostAs far as South Korea goes, Samsung are designing their own ARM CPUs.
Sony vs Samsung
In the ARM IP, Sony will win,
Samsung cannot depend on ARM now( at long term )..
They are designing their ARM SoC's,
Because you cannot change everything from one day to another, it takes time..
But working at full-steam in a viable alternative..for sure!!
They depend on it..
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Originally posted by coder View PostI think the specifications were open, but you still had to pay a license fee to implement it.
Why? What would they stand to gain by it?
Maybe, when ecosystems start getting seriously fragmented, I could see them do something like that to try and hold onto some mind share. But, at this stage, I'd say it'd be premature. You don't want to just invite competitors in your front door, when you still hold a very dominant position.
You'll have to do better than that. What's really better about RISC-V than POWER (or vice versa)? I have no stake in the matter, but I think it's a topic worthy of exploration.
You might get the idea that I hate RISC-V from that; I don't. I just don't think it's great or somehow more modern than its major competition. It doesn't make a lot of the rookie mistakes from early RISCs (hi/lo SPRs, delay slots) but nothing about it feels especially inspired. I do somewhat like the Compressed extension, and I've been reasonably pleased with the density I've seen from it. I just think that there needs to be more standardization around what I'd consider important functionality, and it seems like the number of nonstandard extensions we've seen from various vendors may be a testament to that. I think there are strong signs things are improving; BitManip seems to be coming along well (and adds a lot of goodies like popcnt and clz, as well as rotate), and I liked what I saw of Andes's proposed P extension for embedded SIMD.
PPC, I generally approve of. It has ops for most things you'd ever want, its code density is very decent, and it has two very good SIMD extensions (VMX and VSX.) I do wish that there was a proper embedded SIMD ISA; Freescale did their own extension for this (SPE) and it was awesome, but I don't believe it's ever been implemented in any IBM chip. I would also like to see a proper variable-length extension (Freescale did this one too - VLE) because density matters in embedded.Last edited by Dawn; 20 August 2019, 08:23 PM.
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Originally posted by torsionbar28 View PostVery cool, RISC-V now essentially has zero leverage over POWER. And unlike RISC-V, you can actually buy POWER hardware today.
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Originally posted by wizard69 View PostThey are also responsible for much of the new vector capability ( the acronym escapes me). The thing that excites me is a desktop or even laptop ARM processor that fully implements that vector standard.
in ARMv7-A and ARMv7-R you don't even have the guarantee of correct values, using NEON..
Yes it stated even in the ARM Documentation..
I look into MIPS SMA,
And its a lot more refined, with single,double precision IEEE.765 compliance,variable length,
With a lot of powerful Mathematical instructions there, for MIPS32 and MIPS64..it's beautiful..
Altivec is also compared in ARM documentation..
In ARMv8, its a lot better, more polished in Compliant single/double precision.. its nice.
And I also want a ARM laptop,
has I also wanted a Loongson one..
Originally posted by wizard69 View PostNot everybody can afford a Fujitsu super computer but many would like an order of magnitude increase in FP processing on their desktop.
6 TFLOPS( 5 Watts )
You very fast see the things in perspective..
Does you want a supercomputer, in your desktop?
go KalRay..Last edited by tuxd3v; 20 August 2019, 09:18 PM.
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