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There is an FPGA and an ARM CPU (which I assume is where Linux runs) that operates the SoC's integrated controllers, like this Displayport display controller.
So they have a dedicated GPU or do they usw a IPCore Based one on the FPGA Part.
It kind of depends on which model of Zynq you're talking about... some have a GPU, the little guys I'm using don't.
Reading the kernel mail list it looks as if they're implementing the DisplayPort management in a way that allows _any_ implementation of DP IP to be supported in the "attached" ARM kernel... which would be cool in the sense you could probably support implementation of several interfaces on a single Zynq chip for driving status displays or something?
Keep in mind DP gets used in embedded (eDP - as in, no external connector) contexts as well.
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