GPU Scheduler Being Implemented For AMDGPU Kernel Driver

[Ancurio]

Not sure why it's not mentioned at all in the article but almost all of these patches were written by Chunmin Zhou, who, if I recall correctly, is one of the first members of the Catalyst / blob team to start working on the open kernel driver.

[boffo]

Thank you AMD developers.

[duby229]

Yeah, I agree. Thank you AMD OSS devs.

[agd5f]

I'm not sure I understand this! Why not maintain one scheduler that handles all work loads or does this assure that graphics always has at least one thread.

HSA queues are virtualized are exposed directly to userspace. There is no ioctl involved in submitting work to the GPU. The userspace process kicks off the work directly. The HSA hardware scheduler provides the virtualization of the HSA controlled compute queues. Graphics, non-HSA compute, UVD, and VCE still use ioctls and kernel controlled queues. The scheduler allows the kernel driver to better arbitrate access to the actual hw rings rather than just first come first serve access to the rings via the ioctl. Among other things this can allow better utilization of the rings than would be possible with just first come first serve access. It also avoids possible stalls imposed by using semaphores to synchronize data access between rings.