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Catalyst->FOSS/LLVM IR->AMDIL/TGSI->LLVM IR/Clang->HW ISA

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  • Catalyst->FOSS/LLVM IR->AMDIL/TGSI->LLVM IR/Clang->HW ISA

    Maybe a interesting topic
    The usage of closed-source catalyst parts in the FOSS driver
    With the permission from AMD.
    A great deal?

    just to make sure this goes not go down in a nvidia-topic forum-threat:

    Originally posted by bridgman View Post
    We used LLVM IR to AMDIL code from the Catalyst OpenCL compiler as a starting point for Tom's LLVM IR to R600/GCN HW ISA back end, which in turn was used in two ways :

    - graphics path, where TGSI was converted to LLVM IR then sent through the R600 back end to generate HW ISA

    - clover compute path, where LLVM IR from Clang was sent directly to the Gallium3D pipe driver (bypassing TGSI) and through the back end to generate HW ISA

    Tom would have to comment on how much time was saved in the end. My impression was that it definitely helped us get started more quickly (starting with something that runs is always a big help) but not sure how much actual time was saved overall.
    How many manpower hours did Tom save with the reuse of catalyst code?

    Why is AMD not advertising such a source-code donating gift?

    Is it possible to use the AMD Mantle API catalyst implementation as a starting point for a FOSS Mantle to HW ISA implementation?

    Someone told me that the per-app-profiles in catalyst maybe could be a source of optimizations in the Foss driver because the performance critical bits are known in the catalyst app-profiles.

    could the ATI Overdrive implementation help to build a FOSS over-clocking tool?

    Will there be a Wayland (display server protocol) implementation in the catalyst? and if so can it help the Foss driver?

    It would be interesting what else can be used in the Foss driver from the catalyst ?
    Last edited by necro-lover; 30 November 2014, 05:57 PM.
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