AMD Ryzen 5 Begins Shipping

[phoronix Administrator Find all posts View Profile Close phoronix]

Phoronix: AMD Ryzen 5 Begins Shipping

Today marks AMD formally launching the Ryzen 5 line-up with immediate availability...

http://www.phoronix.com/scan.php?pag...-Ryzen-5-Ships

[edwaleni Senior Member Find all posts View Profile Close edwaleni]

Most of the other benchmarks of the Ryzen 5 1600 have been extremely positive. At $219, this seems to be an excellent price point for the performance.

Seems to exceed many of the i7's, the 7700 by less than 5%.

I wonder if any of the AMD BIOS makers will create the core "unlock" option to activate the inactive core pair in the package.

[AsuMagic Senior Member Find all posts View Profile Close AsuMagic]

Most of the other benchmarks of the Ryzen 5 1600 have been extremely positive. At $219, this seems to be an excellent price point for the performance.

Seems to exceed many of the i7's, the 7700 by less than 5%.

I wonder if any of the AMD BIOS makers will create the core "unlock" option to activate the inactive core pair in the package.

I thought they'd be "recycling" R7 with defective cores?

[schmidtbag Senior Member Find all posts View Profile Close schmidtbag]

Michael - if you intend to experiment with overclocking, either the 1400 or 1600 would make for good options. If you don't feel like bothering, I'd say get the 1500X or 1600X. You've already done CPU scaling tests by disabling cores, so what you could do is get the 1500X (that is roughly the same frequency as the 1700) and compare the results of that to the scaling tests you did. If the performance comes out to be roughly the same, then you didn't waste your money buying the 1600(X). If there is a performance difference, you could show a chart where the predicted 1600(X) performance would be.

I wonder if any of the AMD BIOS makers will create the core "unlock" option to activate the inactive core pair in the package.

I was wondering why that hasn't cropped up yet myself, but maybe AMD had some sort of agreement to prevent that as it may have resulted in more losses in revenue, either because people weren't buying the more expensive parts, or, people returned a CPU that didn't unlock to their expectations.

[zboson Phoronix Member Find all posts View Profile Close zboson]

Too bad it's two compute modules (or whatever they are called) with two cores disabled per module rather than one compute module with four cores. This will mean some additional latency moving data between the modules.

[oooverclocker Senior Member Find all posts View Profile Close oooverclocker]

Take the 1600. The 1600X isn't packed with the nice Wraith Spire cooler, the 1400 has less cache and a worse cooler, the 1500X is too expensive when you get the 1600 for few bucks more. When you're a power user with your own cooler, get the 1700X or 1800X. Doesn't make sense to save money on the CPU to afford better cooling when the box coolers are already fine

[eydee Senior Member Find all posts View Profile Close eydee]

I thought they'd be "recycling" R7 with defective cores?

Yes, that's the "official" solution. However, if the demand is higher than the number of defective CPUs, they do deactivate good ones too. That's what happened with Phenoms back in the day.

[Michael Phoronix Find all posts View Profile Close Michael]

Take the 1600. The 1600X isn't packed with the nice Wraith Spire cooler, the 1400 has less cache and a worse cooler, the 1500X is too expensive when you get the 1600 for few bucks more. When you're a power user with your own cooler, get the 1700X or 1800X. Doesn't make sense to save money on the CPU to afford better cooling when the box coolers are already fine

Still thinking about it or I might just hold off and buy RX 500 hardware next week.... I was told I would be getting new Polaris 2017 review samples, only to be told minutes later no, they "contacted me in error." So probably wiser spending money on RX 500 hardware over Ryzen 5 CPU.

[duby229 Senior Member Find all posts View Profile Close duby229]

Too bad it's two compute modules (or whatever they are called) with two cores disabled per module rather than one compute module with four cores. This will mean some additional latency moving data between the modules.

Yeah, it seems that way. But just looking at a block diagram, I'm guessing they chose this route because it keeps the amount of L3 cache the same. If they had chose 4 cores in one module it would have half as much L3 cache. They probably have the prefetching logic optimized for streaming data and as such bandwidth sensitive rather than latency sensitive.

[dungeon Banned Find all posts View Profile Close dungeon]

R5 1600X beats 6-core CPU results... of course on extreme OC