Originally posted by shmerl
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The mixed chip is acceptable for my application since DDR5 6000 would supply approximately enough bandwidth to keep 8 cores busy with AVX512 with my application. The other cores could work entirely out of the increased L3 cache on their chiplet.
I guess pinning the game threads to a core range works. I could run games through numactl or taskset. Kind of a pain.
The clock speed limit is likely a thermal limit. The cache will produce a good amount of heat, plus the heat below needs to pass through it to reach the cooler.
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