Originally posted by pkese
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First, the A715:
- Finally drops AArch32 support.
- Actually drops the MOP cache, entirely! This enables a 5th decoder. Slightly better than 5-way throughput, since i-cache includes fusion.
The lack of a MOP cache actually reminds me of Intel's E-cores. Not sure how superficial that similarity really is.
Next, the X3:
- Seems to deviate more from its A-series counterpart than previous X cores? Front-end seems very different.
- Added a 6th decoder & kept the MOP cache, but halved its size (reducing latency). MOP cache bandwidth is 8-way (no change).
- Added 50% more integer ALUs (from 4-way to 6-way; one is ALU/MUL, one is ALU/MAC/DIV)
- ROB size increased from 288 -> 320
All told, the X3 still seems narrower than Intel's Golden Cove and what I think is expected of Zen 4. Therefore, I'm skeptical it can truly challenge them on single-threaded perf, but perf/W and therefore multithreaded performance is more likely in contention. It'll be interesting to see how many more changes ARM is putting into its server-oriented variant (V3?).
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