Announcement

Collapse
No announcement yet.

Ampere Is Designing Their Own Arm Server CPU Cores, Coming In 2022

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • Ampere Is Designing Their Own Arm Server CPU Cores, Coming In 2022

    Phoronix: Ampere Is Designing Their Own Arm Server CPU Cores, Coming In 2022

    Ampere is going public today with a strategy and road-map update where they have now publicly acknowledged they are developing their own in-house server CPU cores.

    https://www.phoronix.com/vr.php?view=30203

  • #2
    5nm process
    does it mean they are directly competing with amd zen4?

    Comment


    • #3
      I used X-Gene and eMAG and breathed a sigh of relief when Ampere went to Neoverse, which generally does not suck, for Altra. I sincerely hope the new Ampere cores are not like the old APM cores were.

      Comment


      • #4
        One thing I'd love to see in Linux is some kind of X86 translation similar to what Apple has done, or even Microsoft if push comes to shove. I imagine these ARM processors are quite beefy and while Linux is great with ARM, a decent translation layer could close some gaps. When ARM chips have good Vulkan support, you can then toss Zink in and cross some big boundaries.

        I think x86 devices will likely perform better, especially in the short run, but what if half the performance got you more than twice the battery life? And what if ARM processors paced improvements quickly in the coming years as they have already been doing?

        I think RISC-V* could be great with an x86 layer too, but my layman intuition says that's not happening very soon.

        Last edited by Mitch; 19 May 2021, 11:56 AM. Reason: *Correction: Change RISC to RISC-V based on replies

        Comment


        • #5
          Originally posted by Mitch View Post
          I think RISC could be great with an x86 layer too, but my layman intuition says that's not happening very soon.
          x86 is RISC under the hood since decades. compatibility layer is relatively small part of the die.

          Comment


          • #6
            Ampere is already a GPU architecture of Nvidia, so incoming lawsuit in 3.. 2.. 1..

            Always nice to se unnecessary and stupid lawsuits though, so bring it on, dudes!

            Comment


            • #7
              Originally posted by Mitch View Post
              One thing I'd love to see in Linux is some kind of X86 translation similar to what Apple has done, or even Microsoft if push comes to shove. I imagine these ARM processors are quite beefy and while Linux is great with ARM, a decent translation layer could close some gaps. When ARM chips have good Vulkan support, you can then toss Zink in and cross some big boundaries.

              I think x86 devices will likely perform better, especially in the short run, but what if half the performance got you more than twice the battery life? And what if ARM processors paced improvements quickly in the coming years as they have already been doing?

              I think RISC could be great with an x86 layer too, but my layman intuition says that's not happening very soon.
              That doesn't make sense. There is a reason we're talking about servers here. And Linux servers running open source don't need a translation layer. They want a high performance/Watt because electricity costs are dominant.

              You likely want to run closed source games on your laptop (my advice get a tower with a decent video card and dual boot). There is no fundamental reason why ARM ISA would save power compared to x86 ISA (at the same performance).

              Comment


              • #8
                "Ecosystem Partners" -> Centos right in the middle of them, LMAO

                Comment


                • #9
                  Originally posted by unic0rn View Post

                  x86 is RISC under the hood since decades. compatibility layer is relatively small part of the die.
                  ? Just because it decodes some opcodes into smaller micro-ops for improved pipelining? That doesn't mean anything, it still implements ~3000 instructions (ARM is around 1000 IIRC) and RISC-V 64 bit is 14+49 (without extensions)

                  Comment


                  • #10
                    Originally posted by kvuj View Post
                    ? Just because it decodes some opcodes into smaller micro-ops for improved pipelining?
                    AFAIK modern x86 processors have been replacing x86 opcodes with fixed-length micro-ops (combining as well as splitting) for a long time now. All, not some.
                    Test signature

                    Comment

                    Working...
                    X