AMD Showed Off New Threadrippers, 7nm Vega At Computex 2018

[schmidtbag]

What? It was all rumours until yesterday.

Fair enough - they were just rumors for several months, but unlike a lot of rumors, this one in particular was a bit more concrete. I'm pretty sure it was confirmed there were going to be 64-core Epycs a few months ago so whether the CCXs doubled in core counts or they doubled the amount of CCXs per package, it was reasonable to assume Threadripper would remain a halved equivalent of Epyc (half the functional CCXs, half the PCIe lanes, half the memory channels, etc) and therefore there would be a 32-core model.

[tuke81]

So when exactly are 7nm gaming cards coming?

2019 most likely.

[chithanh]

32c Threadripper is relatively old news.

What? It was all rumours until yesterday.

The cost for the 32C version is allegedly going to be $1499.

If true, then the price per core would be fantastic and even lower than what you pay for today's TR (16-core 1950X is $959 at NewEgg currently).

Compare that to the Intel HEDT platform, where you used to pay through the nose for every extra core, and even with SKL-X the cost per core is essentially flat ($939 for the 10-core 7900X to $1890 for the 18-core 7980XE).

[shmerl]

So when exactly are 7nm gaming cards coming?

[theriddick]

Hmmm, wonder how much that Intel 28Core 4-5ghz CPU was. I don't think its realistic to run all cores at 5ghz, must be some significant tdp and heat drawbacks.

[torsionbar28]

Vega 56 nano sounds like just what I'm looking for! The R9 nano was a beast, and a jewel for SFF builds.

[schmidtbag]

32c Threadripper is relatively old news. What I personally find surprising is the 32GB of HBM2. That is going to be one gargantuan GPU die.
I also hope the Vega 56 Nano will use the die shrink, or else I'm not sure how they're going to keep it properly cooled without sacrificing too much performance (like they already have).

[sykobee]

The cost for the 32C version is allegedly going to be $1499.

Whilst the socket is octo-channel capable (at least in its server variant), the motherboards aren't, and neither is the CPU itself wired up that way. You can see the current wiring schematic for ThreadRippers online somewhere (shows all the memory channels and InfinityFabric connections between dies within the package substrate).

I think the best we can hope for is faster memory support on the four channels, unless there is an X499 chipset/platform that enables 8 channel memory for TR2.

[lem79]

Wouldn't that be an amazing surprise if all X399 boards were 8-channel capable, just needed the right package wiring? I would have thought someone would have figured out if that was possible by now though (perhaps testing where all of those lands in the TR4 socket actually go to..)

[oleyska]

Just take care if your workloads are sensitive to RAM access latency. Two of the dies have no DRAM controllers in them, so everything RAM-wise for then is "far". In that case, an EPYC should do a better job.

It's not the case for the vast majority of applications, though.

All dies have dram controllers, we do not know if they will have different wiring to utilize 8 channel memory on existing TR2 platform or if they will only Use 2 memory controllers.
I do not know how they could solve it but I've seen nifty pin rearrangement at cpu package level from AMD previously.