Announcement

Collapse
No announcement yet.

SiFive's RISC-V HiFive Unmatched Upgraded To Ship With 16GB Of RAM

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • #41
    Why did they drop ecc ram? (I am assuming they did because I am only counting 8 chips)

    Comment


    • #42
      Originally posted by baryluk View Post
      ...
      I wonder if it supports UEFI? Product Brief only says U-SDK "OpenSBI / U-Boot / Linux Kernel", and E-SDK (bare metal). If it requires device tree files, then I hate it already.
      Not directly, best I can tell OpenSBI is a library that you compile against with a declared target, "The main component of OpenSBI is provided in the form of a platform-independent static library libsbi.a implementing the SBI interface. A firmware or bootloader implementation can link against this library to ensure conformance with the SBI interface specifications. libsbi.a also defines an interface for integrating with platform-specific operations provided by the platform firmware implementation (e.g. console access functions, inter-processor interrupt control, etc)." https://github.com/riscv/opensbi

      You can set the back-end target and then compile u-boot or a linux kernel image with it. The E-SDK is likely intended for Real-Time applications or minimal kernels.

      Though maybe, there's evidence they are playing nice with coreboot, so tianocore may one day be a viable payload, though why you'd bother I don't know . https://github.com/riscv/opensbi/blo...al/coreboot.md

      Comment

      Working...
      X