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Raptor Launches Arctic Tern As An Open-Source BMC Solution

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  • Raptor Launches Arctic Tern As An Open-Source BMC Solution

    Phoronix: Raptor Launches Arctic Tern As An Open-Source BMC Solution

    Open-source device manufacturer Raptor Computing Systems earlier this month teased their new FPGA-based open-source soft BMC product while today that "Arctic Tern" product has been formally announced...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    "A baseboard management controller (BMC) is a specialized service processor that monitors the physical state of a computer, network server or other hardware device using sensors and communicating with the system administrator through an independent connection."

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    • #3
      Isn't too expensive for a BMC?

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      • #4
        if raptor's softBMC module didn't cost a thousand bucks, it would probably make a nice compute module for a POWER-based laptop

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        • #5
          Raptor Computing Systems does really do a good job but the price of all this stuff is really .... no fun.

          i really hope in the future going from dual-socket power9 to single socket power10 will save some bugs.

          we really can not go like this forever in the end the "open" systems will eliminate themself for the costs alone.

          it looks like "FPGA-based open-source soft BMC product" is the most expensive way to do stuff like this.

          what about ASICs like libre-soc ? libre-soc should do the same much cheaper.
          (edit) and it looks like libre-soc get 90nm soon: https://www.phoronix.com/news/Google-SkyWater-90nm " Google + SkyWater Moving To 90nm For Their Open-Source Silicon Design Initiative"
          Phantom circuit Sequence Reducer Dyslexia

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          • #6
            Originally posted by timofonic View Post
            Isn't too expensive for a BMC?
            Yeah about 10x too expensive. It would make sense as a BMC development kit maybe... but not for anyone to actually put into service.

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            • #7
              Originally posted by Developer12 View Post
              if raptor's softBMC module didn't cost a thousand bucks, it would probably make a nice compute module for a POWER-based laptop
              as with all these things pricing comes down if people start ordering in large volume. the fixed NREs of e.g. PCB manufacturing are the same (loading the Tape-and-Reels into the machine, unloading the Tape-and-Reels from the machine) whether you ordered 10 units or 3,000.

              but i can guarantee you, if you look around for an FPGA board, you'll have a really hard time finding one that has a Gigabyte of RAM. you'll find plenty with a Giga*BIT* of RAM (128 mbyte), but those which start to get remotely close to 1 GByte are usually USD 2,000 and above.


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              • #8
                Originally posted by qarium View Post
                what about ASICs like libre-soc ? libre-soc should do the same much cheaper.[/B]"
                ASICs are cheaper per chip compared to FPGAs but have much higher NRE costs as you have to work on tapeout and pay the foundry in addition to everything you'd have to do to if you were using an FPGA. ASICs become cheaper if your volume is high enough which probably is quite low for this niche BMC card.

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                • #9
                  Originally posted by qarium View Post
                  Raptor Computing Systems does really do a good job but the price of all this stuff is really .... no fun.
                  it's just the reality of early manufacturing: an order for 10,000 units you'll find it likely comes down... it would not surprise me... appx 50%. components that cost $1 in QTY 20 "inexplicably" cost $0.05 in volume 10k. someone has to actually place that order for everyone else to benefit though.

                  what about ASICs like libre-soc ? libre-soc should do the same much cheaper.
                  (edit) and it looks like libre-soc get 90nm soon: https://www.phoronix.com/news/Google-SkyWater-90nm " Google + SkyWater Moving To 90nm For Their Open-Source Silicon Design Initiative"
                  yeah too early to tell, yet, but it's really good news all-round. a 90nm FOSSHW PDK? that's a big frickin deal. we need a rather large die area, though. if they've allocated a tiny amount (like they did for sky130 - only 12 mm^2) then it'll be frustratingly useless for us.

                  but - first - and this is kinda important: first you actually need the FOSS VLSI software to support these geometries? and that's about 2+ years of work, and you ideally need un-compromised systems on which to run it?

                  if you truly care about security, transparency, and full auditability, this the absolute last thing you want
                  joshuark writes: Dan Goodin of Ars Technica reports that security researchers have found that rootkits for Unified Extensible Firmware Interface (UEFI) are not rare, and difficult to detect. Kaspersky researchers profiled CosmicStrand, the security firm's name for a sophisticated UEFI rootkit that t...


                  a good way to get fully-transparent right-to-the-bedrock booting would be, ooo, to get a TALOS-II and replace its BMC? and given that VLSI software requires 128 GB to 256 GB of RAM, an extra $1k on a FOSSHW BMC ain't exactly gonna be a kick in the teeth, is it? yes, if you ask the right people, in the right way, you can get grants for these things.

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                  • #10
                    Originally posted by osw89 View Post

                    ASICs are cheaper per chip compared to FPGAs but have much higher NRE costs as you have to work on tapeout and pay the foundry in addition to everything you'd have to do to if you were using an FPGA. ASICs become cheaper if your volume is high enough which probably is quite low for this niche BMC card.
                    efabless chipignite is starting to kick the legs out from under that one. ~USD 10k for 300 actual ASICs. https://platform.efabless.com/chipignite/2110C

                    the reason they can do that is because the job of creating the MPW wafer GDS-II layout is usually done by hand, by the Foundry. cost per client: USD 50,000. e-fabless has intelligently applied *automated software engineering* to that and consequently has completely cut out that cost. hence, USD 9,750 not USD 50,000.

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