SiFive FU740 PCIe Support Queued Ahead Of Linux 5.13

[phoronix]

Phoronix: SiFive FU740 PCIe Support Queued Ahead Of Linux 5.13

Arguably the most interesting RISC-V board announced to date is SiFive's HiFive Unmatched with the FU740 RISC-V SoC that features four U74-MC cores and one S7 embedded core. The HiFive Unmatched also has 16GB of RAM, USB 3.2 Gen 1, one PCI Express x16 slot (operating at x8 speeds), an NVMe slot, and Gigabit Ethernet. The upstream kernel support for the HiFive Unmatched and the FU740 SoC continues...

https://www.phoronix.com/scan.php?page=news_item&px=SiFive-FU740-PCIe-Linux-5.13

[Mark Rose]

They should have priced it at $666.66 like the Apple I. Missed opportunity there.

I want one of these boards just because it's different, but it's a bit much for a toy.

[kvuj]

I want one of these boards just because it's different, but it's a bit much for a toy.

Considering how unique it is, I think it's justified.

What's not justified is the closed source DDR controller, closed source PCI, and a couple of other chips, which... kind of... ruins the whole point of this board. Why not get an NXP board with proper support, and a high performance ISA instead.

Personally keeping an eye for lowRISC for the years to come.

[phoron]

What's not justified is the closed source DDR controller, closed source PCI, and a couple of other chips, which... kind of... ruins the whole point of this board.

Why not get an NXP board with proper support, and a high performance ISA instead.

Thanks, interesting. I didn't know. So you mean closed hardware or that parts of the unmatced need proprietary software (blobs) ?

And what board do you mean ? I've heard i.MX8M needs also blobs for DDR. (last footnote)

[kvuj]

Thanks, interesting. I didn't know. So you mean closed hardware or that parts of the unmatced need proprietary software (blobs) ?

And what board do you mean ? I've heard i.MX8M needs also blobs for DDR. (last footnote)

That's what I meant (in that thread, they show no interest in opening up "blobs"). If you're going to run blobs, why not go with ARM which has a bunch of vector / matrix instructions and a much more mature sofware ecosystem. "Open hardware" is meaningless without open firmware.

I was kinda hoping they would go all in on open source and only contract chip makers (for the controllers) with open source firmware, but it seems they aren't.

At least the SDK / ISA is free.

[microcode]

It is fine for me if it is only as bad as an ordinary PC, or even a pretty good one (like a System76 machine) in terms of firmware. We can make advances through consumer power in the later stage, when the software is ported and the industry is at full tilt; setting standards we can't afford at this point is the same as begging for the status quo.

[mifritscher]

The main problem seems to be the DDR(4) controller - and its training firmware. I understand that the current training algorithms are quite complicated (alone the frequencies at >2 GHz...) - and patent prone.

Perhaps a solution would be to split the "Lower level" Firmware (=register access etc., which can be open source) and the training algorithms - and provide only a very basic training algorithmus (lower frequencies at about e.g. 500 MHz, latencies counters which would be used for the lowest official rate, relative high refresh rates etc.) as open source . Or, if splitting would be too complicated, a open firmware which accomplishes the same.

Disclaimer: I'm not a memory hw specialist, I don't know how low the frequencies etc. can be.

[OneTimeShot]

That's what I meant (in that thread, they show no interest in opening up "blobs"). If you're going to run blobs, why not go with ARM which has a bunch of vector / matrix instructions and a much more mature sofware ecosystem. "Open hardware" is meaningless without open firmware.

I was kinda hoping they would go all in on open source and only contract chip makers (for the controllers) with open source firmware, but it seems they aren't.

At least the SDK / ISA is free.

I don't think that is possible (and probably not the point of this board). If you are going to use anything "off the shelf" (e.g. DDR4 memory modules), there will be some kind of patent that you need to pay for. Hardware isn't released without some patented stuff being added. It's how manufacturers prevent cheap third party stuff being sold.

You'll probably be ok if you join your RISC-V chip to some 20 year old memory...

[phoron]

That's what I meant (in that thread, they show no interest in opening up "blobs"). If you're going to run blobs, why not go with ARM which has a bunch of vector / matrix instructions and a much more mature sofware ecosystem. "Open hardware" is meaningless without open firmware.

I was kinda hoping they would go all in on open source and only contract chip makers (for the controllers) with open source firmware, but it seems they aren't.

At least the SDK / ISA is free.

ACK. Thanks for telling me the bad news. I agree with you... Yes a RK3399 board will do then...

[torsionbar28]

That's what I meant (in that thread, they show no interest in opening up "blobs"). If you're going to run blobs, why not go with ARM which has a bunch of vector / matrix instructions and a much more mature sofware ecosystem. "Open hardware" is meaningless without open firmware.

I was kinda hoping they would go all in on open source and only contract chip makers (for the controllers) with open source firmware, but it seems they aren't.

At least the SDK / ISA is free.

I agree, however SiFive has never made any indications that they were pursuing a Free-as-in-Freedom totally open strategy. I don't know of a single Risc-V vendor who has, come to think of it. The closest thing I'm aware of is the POWER systems from Raptor.

Risc-V is great, it's successful in the marketplace, it's being implemented in all kinds of things including specialized radiation-hardened chips for satellites in outer space. But I have yet to see anyone use it in a totally open foss-friendly design at consumer price points. I think some folks mistook it for a more-open rpi alternative, but without some corporate backer to translate that concept into real hardware, the "openness" of Risc-V is purely a paper exercise.