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Hi, sorry to bother you with my noobness, but i really need some help here since there is not much information available yet.
I have a 945BE Phenom II (AM3) on a M2N-SLI Deluxe (AM2) Motherboard, and I'm having trouble running TPC 0.30 on my recently installed 10.4.2 Ubuntu. When i try to run it i get either one of these two messages:
(With sudo)
1) ./TurionPowerControl: 1: Syntax error: "(" unexpected
(Without sudo)
2) bash: ./TurionPowerControl: cannot execute binary file
I've tried doing a chmod +x on the file, running it as root, moving it to the bin directory. I don't know if any of these things were even helping >< but I've officially ran out of options.
What am i doing wrong? What should i do to get it working?
Thanks a lot for your attention.
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Originally posted by nico_mic View PostHi, sorry to bother you with my noobness, but i really need some help here since there is not much information available yet.
I have a 945BE Phenom II (AM3) on a M2N-SLI Deluxe (AM2) Motherboard, and I'm having trouble running TPC 0.30 on my recently installed 10.4.2 Ubuntu. When i try to run it i get either one of these two messages:
(With sudo)
1) ./TurionPowerControl: 1: Syntax error: "(" unexpected
(Without sudo)
2) bash: ./TurionPowerControl: cannot execute binary file
I've tried doing a chmod +x on the file, running it as root, moving it to the bin directory. I don't know if any of these things were even helping >< but I've officially ran out of options.
What am i doing wrong? What should i do to get it working?
Thanks a lot for your attention.
If you think you could use my pc for testing or sth i'd be delighted to help.
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I've hit the wall, again...
Only this time solution doesn't seem to be so simple.
As i said before, in windows i ran Phenom MSR-Tweaker to get all of my four core multipliers up to 16x so i could get to the adecuate 3.2ghz from the default 800mhz.
Running mPrime benchmark i got this freq: 803.75mhz.
These are my pstate settings for all cores:
core 0 pstate 0 - En:1 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 0 pstate 1 - En:0 VID:40 FID:0 DID:1 Freq:800 VCore: 0.6625
core 0 pstate 2 - En:0 VID:28 FID:5 DID:0 Freq:2100 VCore: 0.8500
core 0 pstate 3 - En:0 VID:40 FID:0 DID:1 Freq:800 VCore: 0.6625
core 0 pstate 4 - En:0 VID:12 FID:16 DID:0 Freq:3200 VCore: 1.2500
This seems to indicate that either the cpu is either on pstate 1 or 3, or that the multiplier is set to 4, since i set cpufreq to 200mhz through BIOS, which I had updated to ver 5001 a while back. I really don't know what this means.
Also HT multiplier is x6 => 1000mhz. And this doesn't seem to indicate that cpu freq is 200mhz (1000/6=166.66). I am really confused here...
Also changing Freq on all pstates doens't seem to be having any effect at all. Benchmark results on mPrime always report the same frequency (803.75mhz) and the same Best time for 768K FFT (97.588ms-98.691ms).
All that I did was -set vcore and nbvoltage to 1.3000v, which imo isn't making any difference (not that it should on it's own) so i can't see if changes are being applied at all. Though i don't think it would make a difference at this moment i mus ask. Should i be running this as root? I ran it as root: "..../tpc-0.30/bin# sudo ./TurionPowerControl -set core all pstate 4 freq 3200 vcore 1.3000" no change on mPrime results.
From find /dev/cpu i get this:
/dev/cpu
/dev/cpu/3
/dev/cpu/3/cpuid
/dev/cpu/3/msr
/dev/cpu/2
/dev/cpu/2/cpuid
/dev/cpu/2/msr
/dev/cpu/1
/dev/cpu/1/cpuid
/dev/cpu/1/msr
/dev/cpu/0
/dev/cpu/0/cpuid
/dev/cpu/0/msr
Hi! Thank you in advance
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If you wish to see what i get with -l here it is =O
Power States table:
-- Core 0
core 0 pstate 0 - En:1 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 0 pstate 1 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 0 pstate 2 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 0 pstate 3 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 0 pstate 4 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
-- Core 1
core 1 pstate 0 - En:1 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 1 pstate 1 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 1 pstate 2 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 1 pstate 3 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 1 pstate 4 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
-- Core 2
core 2 pstate 0 - En:1 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 2 pstate 1 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 2 pstate 2 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 2 pstate 3 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 2 pstate 4 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
-- Core 3
core 3 pstate 0 - En:1 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 3 pstate 1 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 3 pstate 2 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 3 pstate 3 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
core 3 pstate 4 - En:0 VID:10 FID:16 DID:0 Freq:3200 VCore: 1.3000
Processor Maximum PState: unsupported feature
Processor Startup PState: 0
Processor Maximum Operating Frequency: No maximum defined. Unlocked multiplier.
Minimum allowed VID: 63 (0.375v) - Maximum allowed VID 0 (1.550v)
Processor AltVID: 42 (0.637v)
Northbridge Power States table:
PState 0 - NbVid 10 (1.3000) NbDid 0 NbFid 4
PState 1 - NbVid 40 (0.6625) NbDid 0 NbFid 4
PState 2 - NbVid 28 (0.8500) NbDid 0 NbFid 4
PState 3 - NbVid 40 (0.6625) NbDid 0 NbFid 4
PState 4 - NbVid 12 (1.2500) NbDid 0 NbFid 4
Northbridge Maximum frequency: 800
* Warning: PVI mode is set. Northbridge voltage is used for processor voltage at given pstates!
* Changing Northbridge voltage changes core voltage too.
Core 0 C1E CMP halt bit is disabled
Core 1 C1E CMP halt bit is disabled
Core 2 C1E CMP halt bit is disabled
Core 3 C1E CMP halt bit is disabled
Voltage Regulator Slamming time register: 4
Voltage Regulator Step Up Ramp Time: 8
Voltage Regulator Step Down Ramp Time: 8
Processor is using Parallel VID Interface (probably Single Plane mode)
Processor PState Identifier: 0x11
PSI_L bit not enabled
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Hi nico_mic. I'm really sorry I'm replying just now, but I just received the new post notification from phoronix forum
Anyway, first of all, I suggest you to use a testing version of tpc you can find in this post, since you got an AM2 board with an AM2+/AM3 processor:
Discuss both AMD and Intel processors (CPUs) and system memory. Cooling products for processors and overclocking can also be discussed.
Just overwrite the files inside src folder with those contained in this package and then do the compilation again exactly as the manual suggests.
Then, since you got an AM2 board, you have to change the voltage of the northbridge if you wish to undervolt or overvolt your cpu.
BTW I don't understand why you are copying pstate 0 over all the others.
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Hey I have got an interesting setup...
Dual G34 with Extra Spicy Chips... so they are unlocked...
In windows I can use phenomMrsTweaker to push the clock from 1.7 to 3.2 ...needs a vcore boost from 1.1 to 1.35 but meh...
I have it on water so its nice and cool.
The performance is spectacular... but I don't want to use winblows... this is going to be a dedicated folder... linux ftw performance wise.
I can set the settings... ./Turionpowercontrol -set core all ps 0 f 3200 vc 1.35
and running ./Turionpowercontrol -l it shows it set correctly
however... performance and power draw stay the same...
What am I missing?
C1e is disabled in bios... though it didn't work with it on either...
numa is on
arat is on...
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Hello all, I want to announce another advancement in TurionPowerControl development, hitting version 0.40a. This release changelog:
Code:- Underlying program structure has been completely revamped to fully support multiprocessor and multinode machines. Check the documentation for new and removed commands - pf, pd, pv, pall, pallc commands have been removed. FID, DID and VID manipulation are now managed via -set switch. - Full DRAM timings reporting - Extended hypertransport status reporting (link coherency, link frequency and width, etc...) - Scaler has been disabled in this version, since it requires major modifications. It is a low priority and will be reactivated as soon as possible. - Compilation has changed, now it accomplished via make command. Check Chapter 5 for easy instructions. - Project is now hosted on Google Code servers at the address [url]http://code.google.com/p/turionpowercontrol/[/url] . You may find here latest development code here.
Home page for download is here: http://amdath800.dyndns.org/amd
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