RISC-V Announces Initial Batch Of 2022 Specifications: SBI, UEFI, Zmmul, E-Trace

[OneTimeShot]

I don't just mean nonconformant in the sense that they implement the spec but it doesn't match. I'm also referring to all existing SoCs that don't implement at all some or all of these specifications.

I don't think it really matters much. These are all optional processor features, so at runtime the binaries will automatically fall back to software implementations if the instructions aren't supported.

Things like UEFI are going to be firmware updates.

[archkde]

I mostly agree with you on RV in terms of fragmentation, but I have to wonder... what kind of code are you running where division performance is critical? The analysis I've seen of most codes is that most idiv is by a constant and can be implemented efficiently as shift-sub.

I did find one use case now: range coding.

[Developer12]

I don't think it really matters much. These are all optional processor features, so at runtime the binaries will automatically fall back to software implementations if the instructions aren't supported.

Things like UEFI are going to be firmware updates.

These aren't things like AVX. Not having UEFI support for example means your chip won't boot.