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AMD Shares Early Details Of Zen 4 Genoa, Bergamo

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  • AMD Shares Early Details Of Zen 4 Genoa, Bergamo

    Phoronix: AMD Shares Early Details Of Zen 4 Genoa, Bergamo

    In addition to announcing Milan-X processors at the virtual Accelerated Data Center Premiere event, AMD just provided some new public details concerning next-generation Zen 4 processors...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    Sounds like EPYC is seriously competition to Xeon.

    I hope to see AMD present a new Ryzen to counter Intel's 12th generation "Alder Lake". Alder Lake is nice, but it is very power hungry.

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    • #3
      They will, early 2022 for refreshed zen 3. Rumors says 20% gain. Intel will enjoy their lead for a couple of months only.

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      • #4
        Originally posted by uid313 View Post
        Sounds like EPYC is seriously competition to Xeon.
        EPYC is not even a competition for Xeon, it just puts Xeon to its knees, both performance and price wise, except for few specialized AVX512 tasks which require almost monopole execution to stay in sane thermals.

        It's just server upgrade is a relatively slow process, but as it goes, we'll see more and more AMD platforms everywhere. It's rather good that AMD continues to deliver on expectations, not pulling stops to gather a bit more money from a changing market.

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        • #5
          Originally posted by uid313 View Post
          Sounds like EPYC is seriously competition to Xeon.
          Xeon is not even competition.

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          • #6
            So with all that IO_URing work going into 5.16 kernel, will these 96 cores benefit that work?

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            • #7
              Originally posted by kozman View Post
              So with all that IO_URing work going into 5.16 kernel, will these 96 cores benefit that work?
              Yes. When a single AMD and Intel core today alone benefits from the work then so will 96x Zen 4 cores.

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              • #8
                Will Intel even sell any Gracemont based CPU to the hyperscaler, except for evaluation purposes?
                Guess the "traditional" server market for big companies which run HP,Dell and such will still be a place where Intel can sell their Xeons, but the Hyperscalers and Cloud providers will probably use Zen 3 exclusively, at least if Intel does not offer heavy discounts / produce specialiced high-core count parts for them or something like that.

                AMD Stock jumped more than 10% today, after Meta (Facebook) announced that they will use Zen 3 EPYCs in their backend.

                I think it´s very clever of AMD to produce such high-core-count SKUs as this directly competes against and ARM based competition like ThunderX3 or the hyperscalers own designs.

                I further think we are entering an era where I/O bandwidth between the storage and the CPU/Compute systems starts to be the bottleneck for some tasks and not the storage system itself. Same with memory bandwith, and in both of these disciplines AMD has better offerings than Intel. They have more PCIe Lanes and more Memmory channels on all of their EPYC parts than Intel on there highest End Xeon.

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                • #9
                  Originally posted by Alex/AT View Post
                  EPYC is not even a competition for Xeon, it just puts Xeon to its knees, both performance and price wise, except for few specialized AVX512 tasks which require almost monopole execution to stay in sane thermals.
                  I'm still hopeful regarding the reports Toms Hardware had that Zen 4 would have AVX-512.

                  Then, aside from dirty tricks in the compiler, Intel won't have any specific instruction set advantage.

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                  • #10
                    Originally posted by Paradigm Shifter View Post
                    I'm still hopeful regarding the reports Toms Hardware had that Zen 4 would have AVX-512.

                    Then, aside from dirty tricks in the compiler, Intel won't have any specific instruction set advantage.
                    Have you heard about AMX? https://fuse.wikichip.org/news/3600/...pphire-rapids/

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