Arm Begins Bringing Up Neoverse N2, Neoverse V1 Support In The GNU Toolchain

[phoronix]

Phoronix: Arm Begins Bringing Up Neoverse N2 Support In The GNU Toolchain

It was just a few days ago that Arm outlined the Neoverse N2 "Perseus" design as a follow-on to the Neoverse N1 and coming concurrently to the next-generation Cortex-A. Now the company has already jumped on beginning their open-source/Linux enablement work around the Neoverse N2...

http://www.phoronix.com/scan.php?page=news_item&px=Arm-Neoverse-N2-Gas

[Jumbotron]

" The patch denotes the Arm Neoverse N2 as ARMv8.5-A with FP16, BF16, and I8MM. That at least though would discount the rumors that the Neoverse N2 is potentially an ARMv9 design. "


I would imagine that ARM v9.0-A will be introduced with their "Poseiden Generation Platform" in the 2022 timeframe and beyond as illustrated in this slide from ARM when they introduced the update to the Neoverse platform called N2 and the introduction to the new platform V1.

https://3s81si1s5ygj3mzby34dq6qf-wpengine.netdna-ssl.com/wp-content/uploads/2020/09/Arm-Neoverse-roadmap.png

Here is the link to the article on ARM's new platforms and their roadmap from "The Next Platform" which is a sister site to TheRegister.com which primarily deals with HPC and Supercomputer news.

https://www.nextplatform.com/2020/09/22/arm-expands-its-server-universe-with-updated-neoverse-roadmap/

BTW...as far as I know Apple Silicon SoCs beginning with the A13 and continuing with the newly released A14 are the only ARM based CPUs to incorporate ARMv8.4-A in their designs. Apart from some new ARM encryption algorithms and floating point math instructions, along with virtualization, it looks like from an LLVM mailing post that I will post if I can find it again, that what was added to the ARMv8.4-A was support for Apple's homegrown Advance Matrix Math unit and instructions which would build upon ARM's "Scalable Vector Extension" which is for all intents and purposes ARM's version of AVX and AVX2. The Marvell Thunder X3 incorporates ARMv8.3+ which, and someone correct me if I am wrong, added SMT4 and 512 bit SVE extensions which the latter would make ARM's SVE the equivalent of Intel's AVX-512 extensions to their SIMD registers.

[Jumbotron]

Here is something QUITE INTERESTING !!

It seems that the ARM Neoverse N2 Chip will be the basis for the European Processor Initiative. The EPI is a European wide consortium comprised of 27 vendor partners and 10 European countries which are determined to devise the Continent's Common computing platform ranging from Exascale HPC, A.I, Autonomous Autos, Servers and Cloud, Big Data, Space and Robotics.

In other words....a Pan-European Data Integrity and Sovereign Compute platform. And x-86 is NOWHERE to be seen. Nor could it. That would be impossible.

Furthermore it looks like RISC-V chips will play a BiG role in the ARM based European Common Compute Platform as their chips look to serve as an "Accelerator Tile" in the chip package for Data storage acceleration.

According to a talk given by Linaro and on one of their slide sheets, ARM's Neoverse N2 will have ARM's latest ARM v8.6-A instruction additions which among other things will add General Matrix Multiply, Bfloat 16 support, additional SIMD Matix Math manipulators and enhancements to virtualzation.

According to the timeline as set out by the EPI it looks like EPI ARM based CPU code named RHEA will arrive next year and the first EPI Exascale computer with RHEA chips in them will arrive by the end of 2021 or 2022.

Here are the docs pertaining to this European Processor Initiative. First is the actual PDF of the EPI announcement and outline

https://sos23.ornl.gov/wp-content/uploads/2019/03/VII-4-Denis-EPI.pdf

And secondly here is the PDF of slides used in the Linaro talk in March of 2020 on the state of ARM in HPC where they mention that the ARM Neoverse N2 "Zeus" CPU will be the basis for the European Processor Initiative.

https://static.linaro.org/connect/ltd20/presentations/LTD20-106-0.pdf

[Jumbotron]

And the ARM hits just keep on coming.

" Strong hints have emerged that VMware is close to making the Arm version of its ESXi hypervisor a proper product. "

https://www.theregister.com/2020/09/24/vmworld_preview_esxi_on_arm/

[andrei_me]

Poor hijacked thread 😢

[Jumbotron]

Poor hijacked thread 😢

Please do, by all means, prove that anything I said or posted was either....

1: Untrue
2: Inaccurate
3: Flaming or Trolling
4: Unwarranted
5: Not worthy of further research and discussion

Also...please provide any and all evidence that YOU were either hired, appointed or crowned the sole arbiter of what threads should be deemed hijacked.

[Hugh]

Here is something QUITE INTERESTING !!

It seems that the ARM Neoverse N2 Chip will be the basis for the European Processor Initiative. The EPI is a European wide consortium comprised of 27 vendor partners and 10 European countries which are determined to devise the Continent's Common computing platform ranging from Exascale HPC, A.I, Autonomous Autos, Servers and Cloud, Big Data, Space and Robotics.

In other words....a Pan-European Data Integrity and Sovereign Compute platform. And x-86 is NOWHERE to be seen. Nor could it. That would be impossible.

Furthermore it looks like RISC-V chips will play a BiG role in the ARM based European Common Compute Platform as their chips look to serve as an "Accelerator Tile" in the chip package for Data storage acceleration.

According to a talk given by Linaro and on one of their slide sheets, ARM's Neoverse N2 will have ARM's latest ARM v8.6-A instruction additions which among other things will add General Matrix Multiply, Bfloat 16 support, additional SIMD Matix Math manipulators and enhancements to virtualzation.

According to the timeline as set out by the EPI it looks like EPI ARM based CPU code named RHEA will arrive next year and the first EPI Exascale computer with RHEA chips in them will arrive by the end of 2021 or 2022.

Here are the docs pertaining to this European Processor Initiative. First is the actual PDF of the EPI announcement and outline

https://sos23.ornl.gov/wp-content/uploads/2019/03/VII-4-Denis-EPI.pdf

And secondly here is the PDF of slides used in the Linaro talk in March of 2020 on the state of ARM in HPC where they mention that the ARM Neoverse N2 "Zeus" CPU will be the basis for the European Processor Initiative.

https://static.linaro.org/connect/lt...TD20-106-0.pdf

I'm a little confused. They are (also?) adopting RISC V https://www.european-processor-initiative.eu/tag/riscv/