Originally posted by sdack
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Originally posted by sdack
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I agree that HBM2 provides more margin for even higher data rates and is a technically elegant solution.
HBM2 is a traditional trade:
Low pin count, higher frequency (high power), lower cost (DDR). For higher pin-count, lower frequency (low power) and high cost (HBM2).
Bandwidth is pretty similar within the same cost, as is latency.
The problem with HBM is that it's pincount is one magnitude higher. Hence need for an interposer and a local structure (preferrably).
It'll work fine for high end GPUs but HBM2 is going to be difficult for very large memory sizes with CPUs.
I don't know how you would suggest a modular x86 memory architecture for 64G+ RAM sizes?
The interposer structure would be extremely cumbersome. Cost would go through the roof.
I'm pretty sure it can be done, and cost will eventually drop.
But I don't think it will ever catch plain PCB-mounting DDRs in that aspect.
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