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  • pal666
    replied
    Originally posted by vladpetric View Post
    TSMC 10 nm high density SRAM cell: 0.042 µm²
    TSCM 7nm high density SRAM cell: 0.027 µm²

    That is essentially 1.55x. Do you seriously call that doubling?
    from these links tsmc went from 52.51 to 91.2, which is pretty close to doubling, especially if you consider possible amount of rounding between 7 and 8 nm
    Originally posted by vladpetric View Post
    The problem with mega transistors per unit of area is that number of transistors to implement the same thing varies greatly between vendors as well.
    memory cells have same scheme afaik
    Originally posted by vladpetric View Post
    Transistors in 10nm technology are a lot shittier than before (i.e., less reliable, more leaky).
    that's why intel has uncompetitive prices
    Originally posted by vladpetric View Post
    Again, I'd ask you to stop.
    i have allergy to bullshit
    Last edited by pal666; 19 June 2020, 05:36 PM.

    Leave a comment:


  • vladpetric
    replied
    Originally posted by pal666 View Post
    global foundries doesn't have 7nm and will never have
    i already linked you picture with intel 14++ sucking balls compared to competition 10. and i didn't say that equation holds between different vendors. even with equal "smallest feature size" different vendors could have different memory cell areas. but it holds pretty well for one vendor(again you could see nearly double density between 10 and 7 for samsung and tsmc on my link). and when vendor is selling you 6 year old process, he is selling you obsolete shit.
    again you are still living under a rock.
    From these links:

    TSMC 10 nm high density SRAM cell: 0.042 µm²
    TSCM 7nm high density SRAM cell: 0.027 µm²

    That is essentially 1.55x. Do you seriously call that doubling? You're spouting shit and insults at me, and you can't even get what 2x means?

    The problem with mega transistors per unit of area is that number of transistors to implement the same thing varies greatly between vendors and technologies as well. Transistors in 10nm technology are a lot shittier than before (i.e., less reliable, more leaky).

    Again, I'd ask you to stop.
    Last edited by vladpetric; 19 June 2020, 05:35 PM.

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    That used to be the case above 20nm. Not anymore.

    Global Foundries 7nm doesn't offer 4x versus Global Foundries 14nm.
    global foundries doesn't have 7nm and will never have
    Originally posted by vladpetric View Post
    Within the same context, an Intel 14nm SRAM is 0.049µm² (so Intel 14nm is roughly half way in between GF 14nm and GF 7nm).
    i already linked you picture with intel 14++ sucking balls compared to competition 10. and i didn't say that equation holds between different vendors. even with equal "smallest feature size" different vendors could have different memory cell areas. but it holds pretty well for one vendor(again you could see nearly double density between 10 and 7 for samsung and tsmc on my link). and when vendor is selling you 6 year old process, he is selling you obsolete shit.
    Originally posted by vladpetric View Post
    Again, nanometers are the smallest feature size, not the size of a transistor or a memory cell.
    again you are still living under a rock.

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    nanometers are the smallest feature size,
    they were many decades ago. features don't shrink with equal rate, so this metric stopped to have any practical meaning and it was changed long ago to realative memory cell area. i.e. with old metric X cell had Y area, so with new metric X/2 cells have Y/4 area, that's all.
    Originally posted by vladpetric View Post
    And I wasn't talking to you, but rather
    spreading bullshit misinformation

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    Unfortunately (TTBOMK) we don't have an updated density chart.
    you could cry for intel 14 nm with string of pluses here https://en.wikichip.org/wiki/File:7nm_densities.svg

    Leave a comment:


  • vladpetric
    replied
    Originally posted by pal666 View Post
    only in your imagination.
    so you should be happy that it represents relative area of memory cell(relative to other nm numbers)
    in your imaginary world it will translate into widely different prices per transistor and make some production uncompetitive. like intel's in real world
    and intel just forgot call it 12 or 11 nm ?
    you didn't show any actual data
    nanometers are the smallest feature size, which are correlated with, but don't directly indicate density. And I wasn't talking to you, but rather to a civilized member of the human species. Please stop.

    Leave a comment:


  • vladpetric
    replied
    Originally posted by pal666 View Post
    because 14nm was obsolete few years ago
    i'm sure you don't know what that means, so i can educate you. it means precisely this: 14 nm memory cell takes quarter of space of 28 nm memory cell. that's how those numbers are defined.
    That used to be the case above 20nm. Not anymore.

    Global Foundries 7nm doesn't offer 4x versus Global Foundries 14nm.



    Global foundries 7nm SRAM, High Density: 0.0269 µm²



    Global foundries 14nm SRAM, High Density: 0.081

    Rather, a factor of 3.

    Within the same context, an Intel 14nm SRAM is 0.049µm² (so Intel 14nm is roughly half way in between GF 14nm and GF 7nm).

    Again, nanometers are the smallest feature size, not the size of a transistor or a memory cell.

    It is highly typical of a**holes like you to perpetrate propaganda without looking at the data, and then claim that the opposing side is doing just that. Reminds me of the person in the whitehouse. Please, if I can I'd rather avoid interactions with you in any way possible. This website sadly doesn't have a block button.

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    14 nm means just one thing - the widths of the smallest slits in the photolitography masks (aka the feature size).
    only in your imagination.
    Originally posted by vladpetric View Post
    Most importantly, it does not represent the size of a transistor (actually, even the size of a transistor is not a fair benchmark, typically the size of a functional cell, such as the area of one bit memory register, is a much better benchmark).
    so you should be happy that it represents relative area of memory cell(relative to other nm numbers)
    Originally posted by vladpetric View Post
    You can have widely different densities for the same "nanometers" in fact. That wasn't the case a decade ago, but it is definitely the case now.
    in your imaginary world it will translate into widely different prices per transistor and make some production uncompetitive. like intel's in real world
    Originally posted by vladpetric View Post
    Current (2020) 14 nm Intel technology is not the same as the one in 2014. If I remember correctly, it's more than 50% denser in fact.
    and intel just forgot call it 12 or 11 nm ?
    Originally posted by vladpetric View Post
    Of course, feel free to prove me wrong with actual data.
    you didn't show any actual data

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    My comment wasn't addressed to Intel.
    your comment was informed by intel propaganda

    Leave a comment:


  • pal666
    replied
    Originally posted by vladpetric View Post
    Why do you care that it's only 14nm?
    because 14nm was obsolete few years ago
    Originally posted by vladpetric View Post
    And do you even know what that means when it comes to semiconductor technology?
    i'm sure you don't know what that means, so i can educate you. it means precisely this: 14 nm memory cell takes quarter of space of 28 nm memory cell. that's how those numbers are defined.

    Leave a comment:

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