Originally posted by schmidtbag
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PCIe 7.0 Specification v0.5 Published - Full Spec Next Year
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Originally posted by ahrs View Post
That's what riser-cables are for and the sort of people that operate more than one 4090 at a time are happy with that. From a thermal standpoint you don't want all of those multiple GPUs you have stuck in a hotbox anyway.
Personally, I'd be happy if motherboards started coming with more .m2 slots. I have 2 in my machine and wanted to install a 3rd recently for increased capacity. I had to buy a PCI adapter to do it and those aren't cheap if you need support for multiple drives. In my case it was just a single drive so the cheap adapter I got from Sabrent worked fine but I hope future generations of motherboards address this. I really don't need so many SATA ports anymore and would gladly trade some of them for .m2 slots.
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Originally posted by pong View PostBut as the NVIDIA 4090 shows basically the GPU's already just about the size of many motherboards so even if you HAD the slots for more,
you're not going to have the space mechanically or PSU / cable sanity if you tried.
Personally, I'd be happy if motherboards started coming with more .m2 slots. I have 2 in my machine and wanted to install a 3rd recently for increased capacity. I had to buy a PCI adapter to do it and those aren't cheap if you need support for multiple drives. In my case it was just a single drive so the cheap adapter I got from Sabrent worked fine but I hope future generations of motherboards address this. I really don't need so many SATA ports anymore and would gladly trade some of them for .m2 slots.
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Originally posted by pWe00Iri3e7Z9lHOX2Qx View PostI was planning to wait for Zen 5 or Arrow Lake for my next desktop upgrade, but I got antsy and just built an AM5 / Zen 4 system over the weekend. Last I had read, PCIe 6.0 devices would start shipping sometime in 2024. The bandwidth gains are awesome, but I wish we'd get more sane / useful layouts on consumer devices. E.g. my new motherboard has an x16 PCIe 5.0 slot which sounds nice for future proofing. But I would much rather the equivalent bandwidth from that one slot be delivered by PCIe 4.0 x16 / x8 / x4 / x4 slots.
The apparent model is that a basic PC with CPU+IGPU should be enough for "most anyone" so expansion capability is almost neglected entirely in practice other than by plugging in random slower USB2/3 stuff.
Then for the "gamers" or "productivity" people, ok, buy a premium motherboard and we'll give you one decent PCIE x16 slot where you can install one GPU and probably have things sort of work mechanically / thermally / electrically.
Oh, you want more M.2 SSDs, 2-4 GPUs, maybe a couple 10-100 Gb NICs? Several high capability TB / USB4 / type C ports? Too bad for you, you're not getting anywhere near enough PCIE lanes / slots / USBC ports / USB4 ports etc. to basically get away with more than a couple significant peripherals. Maybe if you buy the halo $1200 motherboard you can have another usable slot or two for PCIE.
So USB4 / newer thunderbolt, newer PCIE4/5/+ are all very nifty things. So is ECC DRAM etc. etc. M.2 NVME SSDs. I'm looking forward to the day when I can actually USE a non-trivial amount (1-2) of such things in a reasonable "prosumer" computer.
But as the NVIDIA 4090 shows basically the GPU's already just about the size of many motherboards so even if you HAD the slots for more,
you're not going to have the space mechanically or PSU / cable sanity if you tried.
Can't we just make PCs scalable again? I remember "easily" being able to get 6-8 ISA or PCI slots on motherboards for modest cost.
Dual-socket ones also.
Now the back panel is such a cluster you can't even really see or have room to plug in adjacent USB etc. ports.
How's this going to work for the next 3-4 desktop PC generations?
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[ they prepared mostly always 2 gens of development milestones in advance for display, what makes me curious, what v8.0 and v9.0 (~TB each direction for x16, ~60GB/(s*x1) could keep on doubling bandwidth (PCIe 3.0 ~0.985GB/(s*x1), PCIe 4.0 ~1.97GB/(s*x1), PCIe 7.0 ~15.1GB/(s*x1) each direction lane ) and staying compatible through all versions and 'FEW' (forward error correction) since 6.0; with enabling doubling bw development, they would definitely 'brake records' for bw on consumer devices (for an arriving decade's scale), maybe only challenged by Thunderbolt&USB (~10GB/s(-120Gbps_unidir)_2024)? ]
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Originally posted by CommunityMember View PostThe SI issues for PCIe Gen 7 is going to require PCB vendors to shorten traces and add even more layers. It is going to be quite the expensive board (although the server space is not as price sensitive as the consumer market).
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The SI issues for PCIe Gen 7 is going to require PCB vendors to shorten traces and add even more layers. It is going to be quite the expensive board (although the server space is not as price sensitive as the consumer market).
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Crazy how 7.0 x1 is faster than 3.0 x16, when you consider 3.0 is still quite good in most cases.
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I was planning to wait for Zen 5 or Arrow Lake for my next desktop upgrade, but I got antsy and just built an AM5 / Zen 4 system over the weekend. Last I had read, PCIe 6.0 devices would start shipping sometime in 2024. The bandwidth gains are awesome, but I wish we'd get more sane / useful layouts on consumer devices. E.g. my new motherboard has an x16 PCIe 5.0 slot which sounds nice for future proofing. But I would much rather the equivalent bandwidth from that one slot be delivered by PCIe 4.0 x16 / x8 / x4 / x4 slots.
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