PCI Express 5.0 Announced With 32GT/s Transfer Rates

[xnor]

We don't even have that many PCIe 4.0 devices on the market, and 5.0 is already announced?

4.0 was announced 2011~2012 and the final specification published mid 2017. That's when 5.0 was announced. Manufacturers had well over 2 years to implement PCIe 4.0.
5.0 specification has already been published in May this year.

Btw, DDR 5 development was announced about the same time as PCIe 4.0. SK Hynix for example produced their first DDR 5 chip last year.


Unless 3rd gen Ryzen has a DDR5 controller, upgrading your system now is kinda a bad idea since the next mainboards, chipsets and CPUs will be using DDR5 (double the bandwidth and capacity).

[ms178]

The interesting part of PCIE 5-0 would be, if it provided cache coherency. But from Intel's CXL announcement, I am not sure from the wording if it is inherent to all PCIE 5.0 implementations or just when paired with Intel's CXL capable one, it sounds to me that the latter is the case. I also wonder what AMD and Nvidia do here in regard to CXL. Are their Gen-Z/CCIX- or OpenCAPI-capable devices supported with their full cache coherent potential on CXL platforms or do they need to support yet another protocol?

[wizard69]

You our guys are getting hung up on a fan on the chipset believing it will shorten lifetime. Maybe maybe not it really comes down to just how hot the chip might get. Beyond that chipset support IC’s have had heatsinking for sometime on motherboards. The use of a fan could make for better lifetimes as opposed to randomly routed cooling in some PC’s.

In any event higher performance and heat go together. You can’t get one without the other unless you do a significant process shrink. If you need the advantages of 5 series PCI Express you will need to deal with heat. It will be seen on the motherboard and any slave taking advantage of this standard.

You have to thank AMD for that engineering disaster as that design was built in-house and - as it turns out - drew much more power under certain conditions. I wonder why they let it ship in this condition or planned for a 25W chip in the first place for desktop boards. I also consider active cooling on motherboards a no-go for the exact reasons you mentioned.

25watts isn’t a lot for what is-on offer here.

But back on topic, PCIE 4.0 and 5.0 seems to be technology already pushed to their limits. They need retimers and more expensive PCB materials to get a decent signal, making motherboards even more expansive. I hope that GenZ, CCIX and the SFF-TA-1002 connectors will fix this mess and reduce costs for motherboards again while enabling even better functionality. Of course that needs a solution for backwards compatibility. But I can see a transition phase with these two competing connectors on motherboards and phasing PCIE out in the long run.

You pay for speed in many ways. Speed is heat but there are also significant issues with signal integrity. Frankly we see the same issues with the various RAM standards. Going faster means old topologies go out the Window, costs go up and motherboard design becomes more difficult.

[wizard69]

Please if you are not interested in a state of the art motherboard please stop whining about this one!

It could be a bit of both. From what I have heard so far, NVMe-RAID is pushing the I/O quite heavily and maybe that draws too much power or produces to much heat in the specific function block on that IC? As we haven't seen many other PCIe 4.0 implementations, that could be restricted to AMD's specific implementation of that particular feature. At least I haven't heard of the same trouble with IBM's PCIe 4.0 implementation.

This article here is enlightening still for my point above, that PCIe 4.0 and 5.0 are pushing this technology to its limits: https://www.eetasia.com/news/article...t-at-what-cost

[ms178]

Please if you are not interested in a state of the art motherboard please stop whining about this one!

I am very interested in state of the art hardware, but I can still question bad engineering decisions, yes?! The industry should have moved on sooner to other technologies which solve these problems in a more cost-effective way. And I've cited the efforts from the GenZ-Consortium which I find more clever and could have been adopted sooner by all relevent market players. The PCI-SIG instead does leave the consumer to pay the bill in the forseeable future. Considering that this technology has to trickle down to the mass market sooner or later, I wonder how they want to get there. You have to consider that some motherboard makers do think that a fan already adds too much extra costs. They now need vastly more expensive PCB materials to ensure good signal integrity. Just great, isn't it?