Intel's User Interrupts With Sapphire Rapids Looking Quite Great For Faster IPC

[phoronix]

Phoronix: Intel's User Interrupts With Sapphire Rapids Looking Quite Great For Faster IPC

Earlier this month Intel engineers posted their initial Linux kernel enablement around x86 User Interrupts with this feature premiering with Xeon "Sapphire Rapids" CPUs. As implied by the name, the User Interrupt functionality allows for interrupts to bypass the kernel for more efficient, low-latency, low-utilization interrupts being received by other user-space tasks. Intel talked more about User Interrupts this week at LPC2021...

https://www.phoronix.com/scan.php?page=news_item&px=Intel-x86-User-Interrupts-LPC

[tildearrow]

Linux slideshow made in PowerPoint

[SkyWarrior]

It would be hilarious if it was made on an Apple M1 macbook with Office 365

[nranger]

It would be hilarious if it was made on an Apple M1 macbook with Office 365

Not so much as hilarious, as it would be depressingly common. Go to any "Open Source" conference that's not a Gnome or KDE get together, and a majority of the presenter laptops are Macbooks, followed by Thinkpads, which probably dual boot Windows.

I wonder if the Linux Foundation President finally ditched his Macbook?

[mdedetrich]

Not so much as hilarious, as it would be depressingly common. Go to any "Open Source" conference that's not a Gnome or KDE get together, and a majority of the presenter laptops are Macbooks, followed by Thinkpads, which probably dual boot Windows.

Whats wrong with Thinkpads?

[pipe13]

Whats wrong with Thinkpads?

I don't own one.

[SkyWarrior]

Thinkpads are totally ok for me. I have one that boots to fedora only. Works like a charm.

[Spacefish]

User space Interrupts for IPC will be a big win, especially for context switch intensive workloads. Let´s hope intel does not create another Meltdown or Spectre side-channel and has to remove all those improvements / potential gains via a microcode update.. Remember TSX?

Wonder what market AMX is targeted at. Sapphire Rapids is Xeon only, so mainly servers. But on servers if you want to do machine learning you probably buy a dedicated accelerator like a CDNA GPU.. AMX will probably lack performance and power efficiency wise compared to dedicated accelerators, who would buy this / use this.
In client / workstation CPUs maybe, to execute models faster, but on servers?

I wonder when the point is reached where you have so many extensions on x86 that it´s cheaper transistor count wise to have some sort of FPGA in the CPU which get´s reconfigured on demand / by software. Much like the Xilinx Alveo cards, maybe with the Xilinx acquisition by AMD we will see something like that in a few years?!
Would be cool as you could simply "configure" such an accelerator to perform your specific algorithm in a very performant and power efficient way, not as good as fixed function but better than a generic CPU architecture.

[paulpach]

Could this be used with microkernels? AFAIK, the performance problems that microkernels have are due to slow IPC.

[jayN]

I noticed there is description of IPI virtualization for SPR in their reference manual now.