Originally posted by maldorordiscord
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first integer SIMD was MMX (integer-32bit): http://en.wikipedia.org/wiki/MMX_%28instruction_set%29
one of the first floating-point SIMD was 3dnow(floating point 32bit): http://en.wikipedia.org/wiki/3DNow!
MMX+3Dnow in 64bit is called SSE: http://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
another vector SIMD standard is AltiVec http://de.wikipedia.org/wiki/AltiVec
SSE4 is 128 bit vector then and AVX is 256bit vector: http://de.wikipedia.org/wiki/AVX
and the Integer extensions of the AVX generation is called FMA http://de.wikipedia.org/wiki/FMA_x86
comparison to Loongson: Loongson 3A only do have 64bit-128bit vector Loongson 3B do have 256bit Vector and 256bit integer SIMD and the Longson 3C do have 2pices of 512bit vector SIMD per core and 1 piece of 512bit integer SIMD.
In my knowledge the Loongson's SIMD units try to compatible with the ARM one:
Loongson use the Vector unit from ARM : http://en.wikipedia.org/wiki/ARM_arc...IMD_.28NEON.29
on the level: ARMv8 64-bit VFP and advanced SIMD (NEON) standard
one of the first floating-point SIMD was 3dnow(floating point 32bit): http://en.wikipedia.org/wiki/3DNow!
MMX+3Dnow in 64bit is called SSE: http://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
another vector SIMD standard is AltiVec http://de.wikipedia.org/wiki/AltiVec
SSE4 is 128 bit vector then and AVX is 256bit vector: http://de.wikipedia.org/wiki/AVX
and the Integer extensions of the AVX generation is called FMA http://de.wikipedia.org/wiki/FMA_x86
comparison to Loongson: Loongson 3A only do have 64bit-128bit vector Loongson 3B do have 256bit Vector and 256bit integer SIMD and the Longson 3C do have 2pices of 512bit vector SIMD per core and 1 piece of 512bit integer SIMD.
In my knowledge the Loongson's SIMD units try to compatible with the ARM one:
Loongson use the Vector unit from ARM : http://en.wikipedia.org/wiki/ARM_arc...IMD_.28NEON.29
on the level: ARMv8 64-bit VFP and advanced SIMD (NEON) standard
You can handle 8 SSE (vector) 64bit instructions in 1 single 512bit vector simd instruction.
By the way, the ARM SIMD instructions use 8 and 16 bit packed together in a 32 bit register and are not compatible to SSE.
You should stop to "imagine" your facts, you are making yourself looking stupid, Qaridarium.
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