How many kLE are necessary for an OpenRisc + FBrunoVGA + peripherials implementation ?
For what I see in OR2K document and fbruno specs, 150kLE will be more than good for starting point of a dev board, is it right ?
Unfortunally these fpga are not very cheap but not expensive at all for what we want.
Which is the minimum trace width and layers for a PCB with FPGA like this?
For what I see in OR2K document and fbruno specs, 150kLE will be more than good for starting point of a dev board, is it right ?
Unfortunally these fpga are not very cheap but not expensive at all for what we want.
Which is the minimum trace width and layers for a PCB with FPGA like this?
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