The Linux kernel's RISC-V processor support is getting into good shape now since the support for this open-source processor ISA was originally introduced back for Linux 4.15. Moving forward, it's now expected the support to be maintained and only improve for the HiFive Unleashed developer board.

Amazon AWS has added support for the RISC-V open-source processor architecture to their FreeRTOS kernel.

The mainline GNU GRUB boot-loader now supports the RISC-V architecture as another important step for better mainline support for this new, royalty-free processor ISA.

Besides having a dedicated Intel GPU to look forward to in 2020, the effort around creating an open-source RISC-V architecture based graphics processor continues being spearheaded by Luke Kenneth Casson Leighton and other libre hardware developers.

RISC-V remains of a lot of interest to open-source/Linux users for being a royalty-free and completely open CPU architecture. In part due to the lack of affordable RISC-V hardware limiting developers from working more on this architecture, the state of RISC-V support by Linux distributions varies but at least has improved a lot in recent years.

With the proposed Libre RISC-V Vulkan accelerator aiming to effectively be an open-source GPU built atop the open-source RISC-V ISA there were recently some new details published on how the design is expected to work out.

For those interested in the proposed quad-core RISC-V Libre SoC that is intended to go in-step with the Rust-written Kazan for offering Vulkan support, the initial performance target has now been shared.

More than a year ago Western Digital talked up how they would begin designing RISC-V cores and shipping them in devices and that is indeed panning out. The company has unveiled their new SweRV core and plans to open-source it in 2019.

Stemming from the recent proposal about a libre GPU using a RISC-V chip running a Rust-based software renderer like a software-based Vulkan implementation, the developer appears to be ready to take on designing a quad-core RISC-V libre SoC that he believes can be competitive for mobile devices.

The Linux Foundation and RISC-V Foundation are announcing a joint collaboration effort today to promote open-source development and adoption around this royalty-free CPU instruction set architecture.

SiFive this week announced their 7-Series RISC-V cores with the 32-bit E7, 64-bit S7, and 64-bit U7 series. These new RISC-V parts aren't yet capable of running up against the fastest ARM Cortex CPU cores available today, but they are much more powerful than the previous-gen SiFive cores.

With the increasingly popular RISC-V open-source processor instruction set architecture (ISA), there is the possibility for vendor-specific instruction set extensions. At this point the kernel has no infrastructure in place for its RISC-V port to allow for such bits, but that is being worked on as part of bringing up AndeStar RISC-V CPUs under the Linux kernel.

In addition to working on OpenMandriva Lx 4.0 as this distribution's next major release with its roots tracing back to the legendary Mandrake, its developers have also been working on clean ports of this Linux distribution to other CPU architectures.

Over the past decade and a half of covering the Linux graphics scene, there have been many attempts at providing a fully open-source GPU (or even just display adapter) down to the hardware level, but none of them have really panned out from Project VGA to other FPGA designs. There's a new very ambitious project trying to create a "libre 3D GPU" built atop RISC-V, leveraging Rust and LLVM on the software side, and would also support Vulkan.

Back in June we brought up how some of the SiFive HiFive Unleashed initialization code was closed-source for this developer board built around the RISC-V open-source processor ISA. One of the pain points was the DDR memory initialization code being closed-source but then SiFive announced they would allow for a fully open-source boot process. They've now made good on their word with their new open-source project.

The RISC-V open-source processor ISA support within the mainline kernel is getting into good shape, just a few releases after this new architecture port was originally added to the Linux Git tree.

Last week we noted how some of the code to boot the RISC-V SiFive HiFive Unleashed development board was closed-source. That upset some in the Coreboot community with hoping for a more open development board built around the RISC-V open-source processor ISA. The good news is that SiFive will soon be releasing the necessary code for initialization as open-source.

While free software/hardware advocates have been ecstatic about the RISC-V open-source, royalty-free processor architecture, hardware so far hasn't been as open as desired.

Initial RISC-V architecture support was added to the Linux 4.15 kernel and in succeeding kernel releases have been mostly modest updates. With Linux 4.18 the RISC-V changes are on the small side still, but with a few notable additions for this open-source, royalty-free processor ISA.

Over the past week, benchmarks of this first RISC-V development board have begun appearing on OpenBenchmarking.org by the Phoronix Test Suite. Here are some of those initial benchmark numbers.

The initial RISC-V architecture support landed in Linux 4.15 and now this open-source, royalty-free processor ISA is seeing further improvements with the Linux 4.17 cycle.

While initial RISC-V support was added to Linux 4.15, it was only the architecture code and not any device drivers. With Linux 4.16, the RISC-V developers admit this time around they didn't get as many changes in as they were hoping for, but they do have some improvements to land this cycle.

Palmer Dabbelt who maintains the RISC-V ports of GCC, Binutils, Linux, and glibc while working at RISC-V company SiFive spoke at FOSDEM 2018 this weekend about the software/hardware state of this royalty-free open-source CPU ISA.

RISC-V has a big new hardware backer... Western Digital.

There's potentially a lot happening within the open-source RISC space for the Linux 4.15 kernel merge window.

Not only is AMDGPU DC finally aligning for Linux 4.15, but the RISC-V Linux kernel port might also be merged for this next kernel cycle.

RISC-V developers have been preparing their kernel port for the mainline Linux tree while it's looking like for Linux 4.15 that goal may finally be realized.

Last week we reported that RISC-V developers hoped their kernel port would land in Linux 4.13 but it doesn't look like that is going to happen.

RISC-V developers have posted their fourth revision to the kernel patches porting the Linux kernel to this royalty-free CPU instruction set architecture. The developers are hoping this code will be pulled into Linux 4.13, but it's not yet clear if that will happen.

Last month the RISC-V GCC port was approved for landing in GCC 7 while today that merge finally happened.