RISC-V News Archives
The State Of Debian & Fedora On The RISC-V Architecture

RISC-V remains of a lot of interest to open-source/Linux users for being a royalty-free and completely open CPU architecture. In part due to the lack of affordable RISC-V hardware limiting developers from working more on this architecture, the state of RISC-V support by Linux distributions varies but at least has improved a lot in recent years.

9 February 2019 - Still A Lot To Do - 14 Comments
SiFive Unleashes New 7-Series RISC-V Cores With Better Performance

SiFive this week announced their 7-Series RISC-V cores with the 32-bit E7, 64-bit S7, and 64-bit U7 series. These new RISC-V parts aren't yet capable of running up against the fastest ARM Cortex CPU cores available today, but they are much more powerful than the previous-gen SiFive cores.

3 November 2018 - SiFive 7-Series - 30 Comments
Linux Kernel Developers Begin Figuring Out Vendor-Specific RISC-V Code

With the increasingly popular RISC-V open-source processor instruction set architecture (ISA), there is the possibility for vendor-specific instruction set extensions. At this point the kernel has no infrastructure in place for its RISC-V port to allow for such bits, but that is being worked on as part of bringing up AndeStar RISC-V CPUs under the Linux kernel.

2 November 2018 - Vendor-Specific RISC-V - 19 Comments
There's A New Libre GPU Effort Building On RISC-V, Rust, LLVM & Vulkan

Over the past decade and a half of covering the Linux graphics scene, there have been many attempts at providing a fully open-source GPU (or even just display adapter) down to the hardware level, but none of them have really panned out from Project VGA to other FPGA designs. There's a new very ambitious project trying to create a "libre 3D GPU" built atop RISC-V, leveraging Rust and LLVM on the software side, and would also support Vulkan.

28 September 2018 - Very Ambitious Libre GPU - 44 Comments
SiFive Releases HiFive Unleashed RISC-V Open-Source Boot Loader With DDR Initialization

Back in June we brought up how some of the SiFive HiFive Unleashed initialization code was closed-source for this developer board built around the RISC-V open-source processor ISA. One of the pain points was the DDR memory initialization code being closed-source but then SiFive announced they would allow for a fully open-source boot process. They've now made good on their word with their new open-source project.

7 September 2018 - Free The Boot - 5 Comments
SiFive To Release Code As Open-Source For Fully Initializing The RISC-V Board

Last week we noted how some of the code to boot the RISC-V SiFive HiFive Unleashed development board was closed-source. That upset some in the Coreboot community with hoping for a more open development board built around the RISC-V open-source processor ISA. The good news is that SiFive will soon be releasing the necessary code for initialization as open-source.

1 July 2018 - RISC-V Open-Source Boot - 12 Comments
RISC-V Changes Merged For Linux 4.18, Early Perf Subsystem Work

Initial RISC-V architecture support was added to the Linux 4.15 kernel and in succeeding kernel releases have been mostly modest updates. With Linux 4.18 the RISC-V changes are on the small side still, but with a few notable additions for this open-source, royalty-free processor ISA.

16 June 2018 - RISC-V For Linux 4.18 - 6 Comments
RISC-V Changes For Linux 4.16 Aren't As Big As Hoped For

While initial RISC-V support was added to Linux 4.15, it was only the architecture code and not any device drivers. With Linux 4.16, the RISC-V developers admit this time around they didn't get as many changes in as they were hoping for, but they do have some improvements to land this cycle.

7 February 2018 - RISC-V - 1 Comment
The State of RISC-V Hardware & Software In Early 2018

Palmer Dabbelt who maintains the RISC-V ports of GCC, Binutils, Linux, and glibc while working at RISC-V company SiFive spoke at FOSDEM 2018 this weekend about the software/hardware state of this royalty-free open-source CPU ISA.

5 February 2018 - RISC-V - 6 Comments
RISC-V Developers Hope Their Port Will Land In Linux 4.13

RISC-V developers have posted their fourth revision to the kernel patches porting the Linux kernel to this royalty-free CPU instruction set architecture. The developers are hoping this code will be pulled into Linux 4.13, but it's not yet clear if that will happen.

4 July 2017 - RISC-V - 4 Comments

35 RISC-V news articles published on Phoronix.