RadeonSI Lands Bits In Mesa 20.2 For Better Dealing With GPU Virtualization
Written by Michael Larabel in Mesa on 22 July 2020 at 01:13 PM EDT. 25 Comments
MESA --
Well known open-source AMD graphics driver developer Marek Olšák has landed a set of 15 patches into Mesa 20.2 for improving the RadeonSI driver's handling within virtualized environments.

The support added is mid-command buffer preemption and when enabled is mirroring registers in memory using a register shadowing technique. This is being done so that the GPU can switch to a different process at any point within command buffers.

This requires SR-IOV or using amdgpu.mcbp=1 with the kernel driver doing the bulk of the work while from the AMD Mesa side is just the register shadowing bits. The AMDGPU kernel driver with Mid-Command Buffer Preemption (MCBP) allows the host to interrupt and preempt the execution of any hardware ring, such as when sharing the GPU between the host and a virtualized guest.

This functionality works not only for GFX10 Navi and Navi 2 but also GFX9/Vega. The user-space bits are merged for Mesa 20.2.
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