RISC-V Summit 2021 - High Performance Processors, Other Interesting Talks

Taking place in San Francisco from Monday through yesterday evening was the RISC-V Summit for discussions around this dominant open-source processor ISA. For those that did not make it to the event, many of the slide decks are available.

The 2021 RISC-V Summit covered the XiangShan as an open-source high performance RISC-V processor out of China, various RISC-V demonstrations, various IoT / edge computing talks in the context of using RISC-V, various Linux kernel features for this ISA, different RISC-V extensions, the various wares of leading RISC-V designer SiFive, and much more.

The XiangShan open-source RISC-V high performance processor talk is probably what I found most interesting with this year's RISC-V Summit. But whether it will deliver on all its goals and see any western availability may be a different story.

From the schedule area is a full listing of tracks and when going to a particular session are the slide decks where currently available.