QEMU Merges Initial Support For nanoMIPS
Written by Michael Larabel in Virtualization on 26 August 2018 at 06:38 AM EDT. 4 Comments
VIRTUALIZATION --
Earlier this year MIPS rolled out the I7200 processor core built on the new "nanoMIPS" architecture. The open-source enablement of this new CPU ISA continues to settle down while the latest accomplishment is support for this new architecture in QEMU.

The nanoMIPS ISA is intended to offer "high performance in substantially reduced code size" and still fulfill the needs of an embedded processor by incorporating all MIPS32 instructions and architecture modules. Yes, it's a 32-bit ISA and intended to co-exist in the embedded ecosystem with MIPS64.

With QEMU 3.0's release earlier this month, work on the next version is in full swing and this weekend nanoMIPS support was merged. The list of merged MIPS updates can be found in this pull request.

The code brings the bits for supporting the nanoMIPS ISA in this processor emulator as well as the nanoMIPS-based I7200 processor target and Malta board. The support has been merged for those interested in MIPS/nanoMIPS.

On the kernel side, there's been the Linux nanoMIPS port but as of Linux 4.19 has yet to be merged. There is also work-in-progress support for nanoMIPS with the GCC compiler.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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