Intel & Their Massively Multi-Core Chip

Mobility talks definitely dominated Intel's Developer Forum last month with information from Montevina and Moorestown to the next-generation Mobile Internet Devices from various vendors. However, talks on multi-core computing definitely ranked high (along with PCI Express 2.0, PCI Express 3.0, and USB 3.0). With technologies like Intel Threading Building Blocks 2.0, Pervasive DataRush, it's time to prepare for a world of massively multi-core computing. Multi-core computing is here and it's here to stay. From assisting in real-time 3D surgery simulations to on-the-fly computerized language translations, many cores will be required.

We meant to share this with everyone earlier, but we got wound up with other announcements and had just now come across these pictures we took earlier. Back during IDF San Francisco, on the show floor we managed to snag some great photos of Intel's 80-core research processor. Intel had a booth on its 80-core Tera-flop research processor, which was even operating and running through some tests. This 80-core processor was built out of 80 separate, but very small, processing cores. These 80 mini cores amounted to a speed of 6.26GHz and had consumed about 150 Watts. These cores were built upon 65nm manufacturing in a 1248-pin package with 100 million transistors.

This operating 80 core processor was running behind a tinted glass window, but Intel had kindly opened this up to Phoronix for some great photos! Click on the images above for enlarged versions (we still have the 3600px originals too, if you ask us). We're still a couple years out from seeing 80 core processors on the market, but this was a great sight to see back at the Intel Developer Forum.