Intel Finally Documents Broadwell's Compute Architecture
Written by Michael Larabel in Intel on 11 September 2014 at 01:26 PM EDT. 2 Comments
From the Intel Developer Forum this week in San Francisco Intel has finally published a white-paper covering their "Gen 8" compute architecture.

Among the key changes with Gen8 compute architecture is that the 32-bit integer computation throughput has been doubled, there's native 16-bit floating-point support added to the execution units, for some Broadwell processors the write bandwidth from the GTI has doubled, there's support for coherent shared virtual memory between CPU cores and the Intel HD Graphics, the L3 data cache capacity has increased, improved local bandwidth between execution units and the L3 data cache, and other changes designed to increase the Gen8 GPGPU performance.

The 20 page document describing Broadwell's compute architecture isn't a formal driver-level programming specification but covers all of the technical changes over previous-generation Ivy Bridge / Haswell compute.

Those interested in reading about Broadwell's compute architecture can read the public documentation via Intel's compute support under Linux for their graphics hardware continues to be implemented in open-source via their Beignet project for exposing OpenCL.
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