
Intel AVX-512 is designed for demanding computational tasks with having 512-bit wide 32 vector registers, eight dedicated mask registers, high speed math instructions, and other new capabilities over existing Advanced Vector Extensions.
On the hardware side, Intel will be introducing AVX-512 to their Xeon Phi co-processors with "Knights Landing" (the 14nm update to Knights Corner) and later will come to traditional Xeon CPUs.
For more details on Intel AVX-512 instructions, read the documentation at software.intel.com. The recent AVX-512 operations support in LLVM can be found from the GitHub mirror commit list.
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