A Number Of Exciting RISC-V Improvements For Linux 5.13
Written by Michael Larabel in RISC-V on 6 May 2021 at 09:07 AM EDT. 5 Comments
From bringing up the PolarFire ICICLE SoC to adding support for KProbes, FORTIFY_SOURCE, and other new kernel features for the RISC-V architecture, the Linux 5.13 kernel changes are exciting for this open-source processor ISA.

Among the RISC-V highlights of new material in Linux 5.13 include:

- Build system improvements including better handling when building the RISC-V Linux kernel with LLVM Clang.

- Support for KProbes, the kernel debugging infrastructure for monitoring events.

- The RISC-V kernel can now be built with FORTIFY_SOURCE, the kernel macro for helping to detect buffer overflows with compile and run-time protections for some functions.

- Support for the memtest= kernel argument.

- A re-arranged kernel memory map in working towards supporting sv48 systems.

- A new errata framework and applying an initial set of errata for some SiFive hardware, including the HiFive Unmatched.

- Support for execute-in-place / XIP.

- DeviceTree for the Microchip PolarFire ICICLE SoC and development board. This PolarFire ICICLE SoC is a five-core Linux-capable RISC-V design for IoT, industrial automation, and other use-cases. The five cores are four SiFive U54 application cores and one SiFive E51 monitor core. The Icicle Kit supports 2GB of LPDDR5 and 1Gb SPI flash and 8GB eMMC flash.

Outside of the RISC-V architecture updates themselves are also other notable RISC-V hardware support improvements for 5.13 like the SiFive FU740 PCIe support.
The list of RISC-V arch changes for Linux 5.13 can be found via this pull request sent out this morning.
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