Linux 4.14 To Get 5-Level Paging, AMD Secure Memory Encryption
Written by Michael Larabel in Linux Kernel on 4 September 2017 at 08:39 AM EDT. 5 Comments
LINUX KERNEL --
Ingo Molnar has sent in his many pull requests of new feature work targeting the Linux 4.14 merge window.

One of Ingo's pull requests of interest to us are the memory management updates, which include some interesting feature work. First up, 5-level paging is now in place for upcoming Intel CPUs. Five-level paging allows the CPUs to support up to 128PB of virtual address space and 4PB of physical RAM. It's an interesting improvement from Intel and actually needed for the modern demands of x86 super computers beginning to hit the existing memory limitations.

There is also now PCID optimized TLB flushing for newer Intel CPUs. This can allow for skipping TLB flushing in many instances.

On the AMD side there is also now the Secure Memory Encryption (SME) support for use with AMD EPYC processors. AMD SME allows system RAM to be transparently encrypted and decrypted by the CPU. With EPYC CPUs now shipping, great to see that code landed.

More details via this pull request.

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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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